From 6d3d5bcdad5a7c35ac64f9f3629f58a069e28416 Mon Sep 17 00:00:00 2001
From: Tomasz Lauda <tomasz.lauda@linux.intel.com>
Date: Tue, 22 Oct 2019 16:37:08 +0200
Subject: [PATCH] cpu: fix cache misalignment

Fixes cache misalignment of active_cores_mask value.

Signed-off-by: Tomasz Lauda <tomasz.lauda@linux.intel.com>
---
 src/arch/xtensa/lib/cpu.c | 14 ++++++++++----
 1 file changed, 10 insertions(+), 4 deletions(-)

diff --git a/src/arch/xtensa/lib/cpu.c b/src/arch/xtensa/lib/cpu.c
index 34849857c..aa7bcc2a4 100644
--- a/src/arch/xtensa/lib/cpu.c
+++ b/src/arch/xtensa/lib/cpu.c
@@ -10,11 +10,13 @@
  * \authors Tomasz Lauda <tomasz.lauda@linux.intel.com>
  */
 
+#include <sof/common.h>
 #include <sof/drivers/idc.h>
 #include <sof/drivers/interrupt.h>
 #include <sof/lib/alloc.h>
 #include <sof/lib/cache.h>
 #include <sof/lib/cpu.h>
+#include <sof/lib/memory.h>
 #include <sof/lib/notifier.h>
 #include <sof/lib/pm_runtime.h>
 #include <sof/schedule/schedule.h>
@@ -32,7 +34,10 @@ extern struct core_context *core_ctx_ptr[PLATFORM_CORE_COUNT];
 extern struct xtos_core_data *core_data_ptr[PLATFORM_CORE_COUNT];
 extern unsigned int _bss_start, _bss_end;
 
-static uint32_t active_cores_mask = 0x1;
+__aligned(PLATFORM_DCACHE_ALIGN) static union {
+	uint32_t value;
+	uint8_t bytes[PLATFORM_DCACHE_ALIGN];
+} active_cores_mask;
 
 void arch_cpu_enable_core(int id)
 {
@@ -55,7 +60,7 @@ void arch_cpu_enable_core(int id)
 		/* send IDC power up message */
 		idc_send_msg(&power_up, IDC_NON_BLOCKING);
 
-		active_cores_mask |= (1 << id);
+		active_cores_mask.value |= (1 << id);
 	}
 
 	irq_local_enable(flags);
@@ -72,7 +77,7 @@ void arch_cpu_disable_core(int id)
 	if (arch_cpu_is_core_enabled(id)) {
 		idc_send_msg(&power_down, IDC_NON_BLOCKING);
 
-		active_cores_mask ^= (1 << id);
+		active_cores_mask.value ^= (1 << id);
 	}
 
 	irq_local_enable(flags);
@@ -80,7 +85,8 @@ void arch_cpu_disable_core(int id)
 
 int arch_cpu_is_core_enabled(int id)
 {
-	return active_cores_mask & (1 << id);
+	return id == PLATFORM_MASTER_CORE_ID ||
+		active_cores_mask.value & (1 << id);
 }
 
 void cpu_alloc_core_context(int core)