mirror of https://github.com/thesofproject/sof.git
mailbox: use mailbox function for SW_REG
SW_REG is in memory window and the cache is enabled, need to writeback the SW_REG. Signed-off-by: Pan Xiuli <xiuli.pan@linux.intel.com>
This commit is contained in:
parent
85ae8e7418
commit
530ef2a213
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@ -26,6 +26,7 @@
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* POSSIBILITY OF SUCH DAMAGE.
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* POSSIBILITY OF SUCH DAMAGE.
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*
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*
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* Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
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* Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
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* Xiuli Pan <xiuli.pan@linux.intel.com>
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*/
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*/
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#ifndef __INCLUDE_MAILBOX__
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#ifndef __INCLUDE_MAILBOX__
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@ -36,6 +37,11 @@
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#include <stdint.h>
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#include <stdint.h>
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#include <sof/string.h>
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#include <sof/string.h>
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/* For those platform did not have SW_REG window, use DEBUG at now */
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#ifndef MAILBOX_SW_REG_BASE
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#define MAILBOX_SW_REG_BASE MAILBOX_DEBUG_BASE
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#endif /* MAILBOX_SW_REG_BASE */
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/* 4k should be enough for everyone ..... */
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/* 4k should be enough for everyone ..... */
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#define IPC_MAX_MAILBOX_BYTES 0x1000
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#define IPC_MAX_MAILBOX_BYTES 0x1000
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@ -100,4 +106,12 @@ void mailbox_stream_write(size_t offset, const void *src, size_t bytes)
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bytes);
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bytes);
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}
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}
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static inline
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void mailbox_sw_reg_write(size_t offset, uint32_t src)
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{
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*((volatile uint32_t*)(MAILBOX_SW_REG_BASE + offset)) = src;
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dcache_writeback_region((void *)(MAILBOX_SW_REG_BASE + offset),
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sizeof(src));
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}
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#endif
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#endif
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@ -27,6 +27,7 @@
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*
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*
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* Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
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* Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
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* Keyon Jie <yang.jie@linux.intel.com>
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* Keyon Jie <yang.jie@linux.intel.com>
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* Xiuli Pan <xiuli.pan@linux.intel.com>
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*/
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*/
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#ifndef __PLATFORM_PLATFORM_H__
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#ifndef __PLATFORM_PLATFORM_H__
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@ -117,13 +118,14 @@ struct sof;
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/* Platform defined panic code */
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/* Platform defined panic code */
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#define platform_panic(__x) { \
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#define platform_panic(__x) { \
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sw_reg_write(SRAM_REG_FW_STATUS, (0xdead000 | __x) & 0x3fffffff); \
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mailbox_sw_reg_write(SRAM_REG_FW_STATUS, \
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(0xdead000 | (__x)) & 0x3fffffff); \
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ipc_write(IPC_DIPCI, 0x80000000 | ((0xdead000 | __x) & 0x3fffffff)); \
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ipc_write(IPC_DIPCI, 0x80000000 | ((0xdead000 | __x) & 0x3fffffff)); \
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}
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}
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/* Platform defined trace code */
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/* Platform defined trace code */
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#define platform_trace_point(__x) \
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#define platform_trace_point(__x) \
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sw_reg_write(SRAM_REG_FW_TRACEP, __x)
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mailbox_sw_reg_write(SRAM_REG_FW_TRACEP, (__x))
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extern struct timer *platform_timer;
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extern struct timer *platform_timer;
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@ -28,6 +28,7 @@
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* Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
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* Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
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* Keyon Jie <yang.jie@linux.intel.com>
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* Keyon Jie <yang.jie@linux.intel.com>
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* Rander Wang <rander.wang@intel.com>
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* Rander Wang <rander.wang@intel.com>
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* Xiuli Pan <xiuli.pan@linux.intel.com>
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*/
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*/
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#ifndef __PLATFORM_PLATFORM_H__
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#ifndef __PLATFORM_PLATFORM_H__
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@ -112,13 +113,14 @@ struct sof;
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/* Platform defined trace code */
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/* Platform defined trace code */
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#define platform_panic(__x) { \
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#define platform_panic(__x) { \
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sw_reg_write(SRAM_REG_FW_STATUS, (0xdead000 | __x) & 0x3fffffff); \
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mailbox_sw_reg_write(SRAM_REG_FW_STATUS, \
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(0xdead000 | (__x)) & 0x3fffffff); \
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ipc_write(IPC_DIPCIDR, 0x80000000 | ((0xdead000 | __x) & 0x3fffffff)); \
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ipc_write(IPC_DIPCIDR, 0x80000000 | ((0xdead000 | __x) & 0x3fffffff)); \
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}
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}
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/* Platform defined trace code */
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/* Platform defined trace code */
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#define platform_trace_point(__x) \
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#define platform_trace_point(__x) \
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sw_reg_write(SRAM_REG_FW_TRACEP, __x)
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mailbox_sw_reg_write(SRAM_REG_FW_TRACEP, (__x))
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extern struct timer *platform_timer;
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extern struct timer *platform_timer;
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