OrgACRN
/
sof
mirror of https://github.com/thesofproject/sof.git
1
0
Fork 0
Code Issues Projects Releases Wiki Activity

ipc4: use IMR_BOOT_LDR_MANIFEST_BASE definition from adsp_memory.h 

Start migrating to use Zephyr definitions for the memory layout.
As we cannot move all users of legacy memory.h, selectively mark
the definitions that have already moved to make.

Signed-off-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
This commit is contained in:
Kai Vehmanen 2022-11-28 17:24:06 +02:00 committed by Kai Vehmanen
parent ff7861f222
commit 4943aaa890
4 changed files with 16 additions and 4 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

3
src/ipc/ipc4/helper.c
View File

@ -19,6 +19,9 @@
#include <sof/list.h>
#include <sof/platform.h>
#include <rtos/wait.h>
#ifdef __ZEPHYR__
#include <adsp_memory.h> /* for IMR_BOOT_LDR_MANIFEST_BASE */
#endif
#include <sof/sof.h>
#include <rtos/spinlock.h>

3
src/platform/intel/cavs/include/cavs/lib/memory.h
View File

@ -35,6 +35,7 @@
#define MAX_MEMORY_SEGMENTS PLATFORM_HPSRAM_SEGMENTS
#ifndef __ZEPHYR__
#if CONFIG_LP_MEMORY_BANKS
#define LP_SRAM_SIZE \
(CONFIG_LP_MEMORY_BANKS * SRAM_BANK_SIZE)
@ -45,6 +46,8 @@
#define HP_SRAM_SIZE \
(CONFIG_HP_MEMORY_BANKS * SRAM_BANK_SIZE)
#endif /* __ZEPHYR__ */
#define PLATFORM_HPSRAM_SEGMENTS DIV_ROUND_UP(PLATFORM_HPSRAM_EBB_COUNT, \
EBB_BANKS_IN_SEGMENT)

4
src/platform/meteorlake/include/platform/lib/memory.h
View File

@ -48,10 +48,6 @@
#define PLATFORM_HEAP_SYSTEM_SHARED 1
#define PLATFORM_HEAP_BUFFER 2
/* boot loader in IMR */
#define IMR_BOOT_LDR_MANIFEST_BASE 0xA1042000
#define IMR_BOOT_LDR_MANIFEST_SIZE 0x6000
#endif /* __PLATFORM_LIB_MEMORY_H__ */
#else

10
src/platform/tigerlake/include/platform/lib/memory.h
View File

@ -15,6 +15,10 @@
#include <cavs/lib/memory.h>
#include <sof/lib/cpu.h>
/* prioritize definitions in Zephyr SoC layer */
#ifdef __ZEPHYR__
#include <adsp_memory.h>
#endif
/* physical DSP addresses */
@ -358,7 +362,9 @@
*/
/* LP SRAM */
#ifndef __ZEPHYR__
#define LP_SRAM_BASE 0xBE800000
#endif
#if CONFIG_MULTICORE
/* alternate reset vector */
@ -436,11 +442,15 @@
#define ROM_RESET_LIT_SIZE 0x200
/* boot loader in IMR */
#ifndef __ZEPHYR__
#define IMR_BOOT_LDR_MANIFEST_BASE 0xB0032000
#define IMR_BOOT_LDR_MANIFEST_SIZE 0x6000
#define IMR_BOOT_LDR_TEXT_ENTRY_BASE 0xB0038000
#define IMR_BOOT_LDR_TEXT_ENTRY_SIZE 0x120
#endif
#define IMR_BOOT_LDR_LIT_BASE (IMR_BOOT_LDR_TEXT_ENTRY_BASE + \
IMR_BOOT_LDR_TEXT_ENTRY_SIZE)
#define IMR_BOOT_LDR_LIT_SIZE 0x22