platform: extract number of available cores

Extracts number of available cores to platform/platcfg.h.
This header is asm friendly and can be easily used in xtos.

Signed-off-by: Tomasz Lauda <tomasz.lauda@linux.intel.com>
This commit is contained in:
Tomasz Lauda 2018-06-19 17:30:16 +02:00 committed by Marcin Maka
parent d5d1f285eb
commit 2e2f669176
12 changed files with 84 additions and 6 deletions

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@ -4,6 +4,7 @@ noinst_HEADERS = \
interrupt.h \
mailbox.h \
memory.h \
platcfg.h \
platform.h \
pm_runtime.h \
shim.h \

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@ -35,4 +35,6 @@
#define PLATFORM_DISABLE_L2CACHE_AT_BOOT 1
#define PLATFORM_CORE_COUNT 2
#endif

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@ -41,8 +41,6 @@
struct sof;
#define MAX_CORE_COUNT 2
/* Host page size */
#define HOST_PAGE_SIZE 4096
#define PLATFORM_PAGE_TABLE_SIZE 256

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@ -36,6 +36,7 @@
#include <arch/cpu.h>
#include <arch/interrupt.h>
#include <platform/interrupt.h>
#include <platform/platcfg.h>
#include <platform/shim.h>
#include <stdint.h>
#include <stdlib.h>
@ -122,7 +123,7 @@ static void irq_lvl2_level5_handler(void *data)
}
/* DSP internal interrupts */
static struct irq_desc dsp_irq[MAX_CORE_COUNT][4] = {
static struct irq_desc dsp_irq[PLATFORM_CORE_COUNT][4] = {
{{IRQ_NUM_EXT_LEVEL2, irq_lvl2_level2_handler, },
{IRQ_NUM_EXT_LEVEL3, irq_lvl2_level3_handler, },
{IRQ_NUM_EXT_LEVEL4, irq_lvl2_level4_handler, },

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@ -4,6 +4,7 @@ noinst_HEADERS = \
interrupt.h \
mailbox.h \
memory.h \
platcfg.h \
platform.h \
pm_runtime.h \
pmc.h \

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@ -0,0 +1,36 @@
/*
* Copyright (c) 2018, Intel Corporation
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* * Neither the name of the Intel Corporation nor the
* names of its contributors may be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
* Author: Marcin Maka <marcin.maka@linux.intel.com>
*/
#ifndef __PLATFORM_PLATCFG_H__
#define __PLATFORM_PLATCFG_H__
#define PLATFORM_CORE_COUNT 1
#endif

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@ -4,6 +4,7 @@ noinst_HEADERS = \
interrupt.h \
mailbox.h \
memory.h \
platcfg.h \
platform.h \
pm_runtime.h \
shim.h \

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@ -33,4 +33,6 @@
#define PLATFORM_RESET_MHE_AT_BOOT 1
#define PLATFORM_CORE_COUNT 4
#endif

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@ -47,8 +47,6 @@ struct sof;
#define PLATFORM_SSP_COUNT 3
#define MAX_GPDMA_COUNT 2
#define MAX_CORE_COUNT 4
/* Host page size */
#define HOST_PAGE_SIZE 4096
#define PLATFORM_PAGE_TABLE_SIZE 256

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@ -36,6 +36,7 @@
#include <arch/interrupt.h>
#include <arch/cpu.h>
#include <platform/interrupt.h>
#include <platform/platcfg.h>
#include <platform/shim.h>
#include <stdint.h>
#include <stdlib.h>
@ -122,7 +123,7 @@ static void irq_lvl2_level5_handler(void *data)
}
/* DSP internal interrupts */
static struct irq_desc dsp_irq[MAX_CORE_COUNT][4] = {
static struct irq_desc dsp_irq[PLATFORM_CORE_COUNT][4] = {
{{IRQ_NUM_EXT_LEVEL2, irq_lvl2_level2_handler, },
{IRQ_NUM_EXT_LEVEL3, irq_lvl2_level3_handler, },
{IRQ_NUM_EXT_LEVEL4, irq_lvl2_level4_handler, },

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@ -4,6 +4,7 @@ noinst_HEADERS = \
interrupt.h \
mailbox.h \
memory.h \
platcfg.h \
platform.h \
pm_runtime.h \
shim.h \

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@ -0,0 +1,36 @@
/*
* Copyright (c) 2018, Intel Corporation
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* * Neither the name of the Intel Corporation nor the
* names of its contributors may be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
* Author: Marcin Maka <marcin.maka@linux.intel.com>
*/
#ifndef __PLATFORM_PLATCFG_H__
#define __PLATFORM_PLATCFG_H__
#define PLATFORM_CORE_COUNT 1
#endif