mirror of https://github.com/thesofproject/sof.git
platform: imx8m: Fix FIFO depth for i.MX8M
On i.MX8M series, SAI FIFO is configured to hold 128 words. (128 x 32 bits). Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
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1a5fc0f188
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29414aa25e
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@ -231,7 +231,12 @@
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#define SAI_FLAG_PMQOS BIT(0)
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#define SAI_FLAG_PMQOS BIT(0)
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#ifdef CONFIG_IMX8M
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#define SAI_FIFO_WORD_SIZE 128
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#else
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#define SAI_FIFO_WORD_SIZE 64
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#define SAI_FIFO_WORD_SIZE 64
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#endif
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/* Divides down the audio master clock to generate the bit clock when
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/* Divides down the audio master clock to generate the bit clock when
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* configured for an internal bit clock.
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* configured for an internal bit clock.
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* The division value is (DIV + 1) * 2.
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* The division value is (DIV + 1) * 2.
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@ -20,13 +20,13 @@ static SHARED_DATA struct dai sai[] = {
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.base = SAI_3_BASE,
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.base = SAI_3_BASE,
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.fifo[SOF_IPC_STREAM_PLAYBACK] = {
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.fifo[SOF_IPC_STREAM_PLAYBACK] = {
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.offset = SAI_3_BASE + REG_SAI_TDR0,
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.offset = SAI_3_BASE + REG_SAI_TDR0,
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.depth = 16,
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.depth = 128, /* in 4 bytes words */
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/* Handshake is SDMA hardware event */
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/* Handshake is SDMA hardware event */
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.handshake = 5,
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.handshake = 5,
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},
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},
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.fifo[SOF_IPC_STREAM_CAPTURE] = {
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.fifo[SOF_IPC_STREAM_CAPTURE] = {
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.offset = SAI_3_BASE + REG_SAI_RDR0,
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.offset = SAI_3_BASE + REG_SAI_RDR0,
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.depth = 16,
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.depth = 128, /* in 4 bytes words */
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.handshake = 4,
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.handshake = 4,
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},
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},
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},
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},
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