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Topology: Add support for DMICPROC macro to intel-generic-dmic.m4 

This patch adds support to define from CMakeLists.txt or a
higher level platform topology file the definition of DMICPROC and
DMIC16KPROC to select desired capture processing algorithms pipeline
from pipe-x-capture.m4 and pipe-x-capture-16khz.m4 macros instead
of hard coded processing eq-iir-volume. It is preparation to add
support for beamformer processing for microphones.

The impacted platforms are sof-hda-generic, sof-cml-rt5682, and
sof-apl-pcm512x. This patch does not change built topologies.

Signed-off-by: Seppo Ingalsuo <seppo.ingalsuo@linux.intel.com>
This commit is contained in:
Seppo Ingalsuo 2020-09-03 18:49:36 +03:00 committed by Liam Girdwood
parent d9de74b231
commit 242cc0ebcb
9 changed files with 80 additions and 20 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

14
tools/topology/CMakeLists.txt
View File

@ -103,12 +103,12 @@ set(TPLGS
"sof-apl-asrc-wm8804\;sof-apl-asrc-wm8804"
"sof-apl-asrc-pcm512x\;sof-apl-asrc-pcm512x"
"sof-apl-src-pcm512x\;sof-apl-src-pcm512x"
"sof-cml-rt5682\;sof-cml-rt5682\;-DPLATFORM=cml"
"sof-cml-rt5682\;sof-cml-eq-fir-rt5682\;-DPLATFORM=cml\;-DHSMICPROC=eq-fir-volume"
"sof-cml-rt5682\;sof-cml-eq-fir-loud-rt5682\;-DPLATFORM=cml\;-DHSEARPROC=eq-iir-volume\;-DPIPELINE_FILTER1=eq_iir_coef_loudness.m4\;-DHSMICPROC=eq-fir-volume\;-DPIPELINE_FILTER2=eq_fir_coef_loudness.m4"
"sof-cml-rt5682\;sof-cml-eq-iir-rt5682\;-DPLATFORM=cml\;-DHSEARPROC=eq-iir-volume"
"sof-cml-rt5682\;sof-whl-rt5682\;-DPLATFORM=whl"
"sof-cml-rt5682\;sof-icl-rt5682\;-DPLATFORM=icl"
"sof-cml-rt5682\;sof-cml-rt5682\;-DPLATFORM=cml\;-DDMICPROC=eq-iir-volume\;-DDMIC16KPROC=eq-iir-volume"
"sof-cml-rt5682\;sof-cml-eq-fir-rt5682\;-DPLATFORM=cml\;-DHSMICPROC=eq-fir-volume\;-DDMICPROC=eq-iir-volume\;-DDMIC16KPROC=eq-iir-volume"
"sof-cml-rt5682\;sof-cml-eq-fir-loud-rt5682\;-DPLATFORM=cml\;-DHSEARPROC=eq-iir-volume\;-DPIPELINE_FILTER1=eq_iir_coef_loudness.m4\;-DHSMICPROC=eq-fir-volume\;-DPIPELINE_FILTER2=eq_fir_coef_loudness.m4\;-DDMICPROC=eq-iir-volume\;-DDMIC16KPROC=eq-iir-volume"
"sof-cml-rt5682\;sof-cml-eq-iir-rt5682\;-DPLATFORM=cml\;-DHSEARPROC=eq-iir-volume\;-DDMICPROC=eq-iir-volume\;-DDMIC16KPROC=eq-iir-volume"
"sof-cml-rt5682\;sof-whl-rt5682\;-DPLATFORM=whl\;-DDMICPROC=eq-iir-volume\;-DDMIC16KPROC=eq-iir-volume"
"sof-cml-rt5682\;sof-icl-rt5682\;-DPLATFORM=icl\;-DDMICPROC=eq-iir-volume\;-DDMIC16KPROC=eq-iir-volume"
"sof-cml-rt5682-kwd\;sof-cml-rt5682-kwd\;-DPLATFORM=cml"
"sof-cml-rt5682-kwd\;sof-whl-rt5682-kwd\;-DPLATFORM=whl"
"sof-cml-rt5682-kwd\;sof-icl-rt5682-kwd\;-DPLATFORM=icl"
@ -204,4 +204,4 @@ foreach(tplg ${TPLGS})
add_dependencies(topologies topology_${output})
endforeach()
add_subdirectory(development)
add_subdirectory(development)

32
tools/topology/platform/intel/intel-generic-dmic.m4
View File

@ -16,6 +16,12 @@ ifdef(`DMIC_DAI_LINK_48k_NAME',`',define(DMIC_DAI_LINK_48k_NAME, `dmic01'))
# define(DMIC_DAI_LINK_16k_NAME, `dmic16k')
ifdef(`DMIC_DAI_LINK_16k_NAME',`',define(DMIC_DAI_LINK_16k_NAME, `dmic16k'))
# Handle possible different channels count for PCM and DAI
ifdef(`DMIC_DAI_CHANNELS', `', `define(DMIC_DAI_CHANNELS, CHANNELS)')
ifdef(`DMIC_PCM_CHANNELS', `', `define(DMIC_PCM_CHANNELS, CHANNELS)')
ifdef(`DMIC16K_DAI_CHANNELS', `', `define(DMIC16K_DAI_CHANNELS, CHANNELS)')
ifdef(`DMIC16K_PCM_CHANNELS', `', `define(DMIC16K_PCM_CHANNELS, CHANNELS)')
#
# Define the pipelines
#
@ -26,20 +32,32 @@ dnl period, priority, core,
dnl pcm_min_rate, pcm_max_rate, pipeline_rate,
dnl time_domain, sched_comp)
# Passthrough capture pipeline using max channels defined by CHANNELS.
# Passthrough capture pipeline using max channels defined by DMIC_PCM_CHANNELS.
# Set 1000us deadline on core 0 with priority 0
PIPELINE_PCM_ADD(sof/pipe-eq-iir-volume-capture.m4,
DMIC_PIPELINE_48k_ID, DMIC_DAI_LINK_48k_ID, CHANNELS, s32le,
ifdef(`DMICPROC_FILTER1', `define(PIPELINE_FILTER1, DMICPROC_FILTER1)')
ifdef(`DMICPROC_FILTER2', `define(PIPELINE_FILTER2, DMICPROC_FILTER2)')
PIPELINE_PCM_ADD(sof/pipe-DMICPROC-capture.m4,
DMIC_PIPELINE_48k_ID, DMIC_DAI_LINK_48k_ID, DMIC_PCM_CHANNELS, s32le,
1000, 0, 0, 48000, 48000, 48000)
undefine(`PIPELINE_FILTER1')
undefine(`PIPELINE_FILTER2')
# Passthrough capture pipeline using max channels defined by CHANNELS.
# Schedule with 1000us deadline on core 0 with priority 0
PIPELINE_PCM_ADD(sof/pipe-eq-iir-volume-capture-16khz.m4,
DMIC_PIPELINE_16k_ID, DMIC_DAI_LINK_16k_ID, CHANNELS, s32le,
ifdef(`DMIC16KPROC_FILTER1', `define(PIPELINE_FILTER1, DMIC16KPROC_FILTER1)')
ifdef(`DMIC16KPROC_FILTER2', `define(PIPELINE_FILTER2, DMIC16KPROC_FILTER2)')
PIPELINE_PCM_ADD(sof/pipe-DMIC16KPROC-capture-16khz.m4,
DMIC_PIPELINE_16k_ID, DMIC_DAI_LINK_16k_ID, DMIC16K_PCM_CHANNELS, s32le,
1000, 0, 0, 16000, 16000, 16000)
undefine(`PIPELINE_FILTER1')
undefine(`PIPELINE_FILTER2')
#
# DAIs configuration
#
@ -73,7 +91,7 @@ PCM_CAPTURE_ADD(DMIC16kHz, DMIC_DAI_LINK_16k_ID, concat(`PIPELINE_PCM_', DMIC_PI
#
dnl DAI_CONFIG(type, dai_index, link_id, name, ssp_config/dmic_config)
ifelse(CHANNELS, 4,
ifelse(DMIC_DAI_CHANNELS, 4,
`DAI_CONFIG(DMIC, 0, DMIC_DAI_LINK_48k_ID, DMIC_DAI_LINK_48k_NAME,
DMIC_CONFIG(1, 500000, 4800000, 40, 60, 48000,
DMIC_WORD_LENGTH(s32le), 200, DMIC, 0,
@ -83,7 +101,7 @@ ifelse(CHANNELS, 4,
DMIC_WORD_LENGTH(s32le), 200, DMIC, 0,
PDM_CONFIG(DMIC, 0, STEREO_PDM0)))')
ifelse(CHANNELS, 4,
ifelse(DMIC16K_DAI_CHANNELS, 4,
`DAI_CONFIG(DMIC, 1, DMIC_DAI_LINK_16k_ID, DMIC_DAI_LINK_16k_NAME,
DMIC_CONFIG(1, 500000, 4800000, 40, 60, 16000,
DMIC_WORD_LENGTH(s32le), 400, DMIC, 1,

15
tools/topology/sof-apl-pcm512x.m4
View File

@ -2,6 +2,15 @@
# Topology for generic Apollolake UP^2 with pcm512x codec and HDMI.
#
# if XPROC is not defined, define with default pipe
ifdef(`DMICPROC', , `define(DMICPROC, eq-iir-volume)')
ifdef(`DMIC16KPROC', , `define(DMIC16KPROC, eq-iir-volume)')
# if CHANNELS is not defined, define with default 2ch. Note that
# it can be overrode with DMIC_DAI_CHANNELS, DMIC_PCM_CHANNELS
# in intel-generic-dmic.m4. Same macros exist for DMIC16K too.
ifdef(`CHANNELS', , `define(CHANNELS, 2)')
# Include topology builder
include(`utils.m4')
include(`dai.m4')
@ -78,12 +87,16 @@ PIPELINE_PCM_ADD(sof/pipe-volume-playback.m4,
# platform/intel/intel-generic-dmic.m4 uses DAI link IDs for PCM IDs so we have
# to use PCM1 and PCM2 for DMICs.
define(CHANNELS, `2')
ifelse(CHANNELS, `0', ,
`
define(DMIC_PIPELINE_48k_ID, `7')
define(DMIC_PIPELINE_16k_ID, `8')
define(DMIC_DAI_LINK_48k_ID, `1')
define(DMIC_DAI_LINK_16k_ID, `2')
include(`platform/intel/intel-generic-dmic.m4')
'
)
#
# DAIs configuration

5
tools/topology/sof-cml-rt1011-rt5682.m4
View File

@ -2,11 +2,16 @@
# Topology for Cometlake with rt1011 spk on SSP1
#
# if XPROC is not defined, define with default pipe
# Note: DMIC16KPROC is hard coded in sof-cml-rt5682-kwd.m4
ifdef(`DMICPROC', , `define(DMICPROC, passthrough)')
# Include SOF CML RT5682 Topology
# This includes topology for RT5682, DMIC and 3 HDMI Pass through pipeline
include(`sof-cml-rt5682-kwd.m4')
include(`abi.h')
DEBUG_START
#
# Define the Speaker pipeline
#

18
tools/topology/sof-cml-rt5682-kwd.m4
View File

@ -23,11 +23,17 @@ define(KWD_PIPE_SCH_DEADLINE_US, 5000)
DEBUG_START
# if XPROC is not defined, define with default pipe
ifdef(`HSMICPROC', , `define(HSMICPROC, volume)')
ifdef(`HSEARPROC', , `define(HSEARPROC, volume)')
ifdef(`DMICPROC', , `define(DMICPROC, passthrough)')
ifdef(`DMIC16KPROC', , `define(DMIC16KPROC, passthrough)')
#
# Define the pipelines
#
# PCM0 <---> volume <----> SSP(SSP_INDEX, BE link 0)
# PCM1 <------------------ DMIC01 (dmic0 capture, , BE link 1)
# PCM1 <---- DMICPROC <--- DMIC01 (dmic0 capture, , BE link 1)
# PCM2 ----> volume -----> iDisp1 (HDMI/DP playback, BE link 3)
# PCM3 ----> volume -----> iDisp2 (HDMI/DP playback, BE link 4)
# PCM4 ----> volume -----> iDisp3 (HDMI/DP playback, BE link 5)
@ -56,13 +62,19 @@ PIPELINE_PCM_ADD(sof/pipe-volume-capture.m4,
1000, 0, 0,
48000, 48000, 48000)
# Passthrough capture pipeline 3 on PCM 1 using max 4 channels.
# DMICPROC capture pipeline 3 on PCM 1 using max 4 channels.
# Schedule 1000us deadline on core 0 with priority 0
PIPELINE_PCM_ADD(sof/pipe-passthrough-capture.m4,
ifdef(`DMICPROC_FILTER1', `define(PIPELINE_FILTER1, DMICPROC_FILTER1)')
ifdef(`DMICPROC_FILTER2', `define(PIPELINE_FILTER2, DMICPROC_FILTER2)')
PIPELINE_PCM_ADD(sof/pipe-DMICPROC-capture.m4,
3, 1, 4, s32le,
1000, 0, 0,
48000, 48000, 48000)
undefine(`PIPELINE_FILTER1')
undefine(`PIPELINE_FILTER2')
# Low Latency playback pipeline 4 on PCM 2 using max 2 channels of s32le.
# Schedule 1000us deadline on core 0 with priority 0
PIPELINE_PCM_ADD(sof/pipe-volume-playback.m4,

4
tools/topology/sof-cml-rt5682.m4
View File

@ -23,8 +23,8 @@ DEBUG_START
# if XPROC is not defined, define with default pipe
ifdef(`HSMICPROC', , `define(HSMICPROC, volume)')
ifdef(`HSEARPROC', , `define(HSEARPROC, volume)')
ifdef(`DMICPROC', , `define(DMICPROC, eq-iir-volume)')
ifdef(`DMIC16KPROC', , `define(DMIC16KPROC, eq-iir-volume)')
ifdef(`DMICPROC', , `define(DMICPROC, passthrough)')
ifdef(`DMIC16KPROC', , `define(DMIC16KPROC, passthrough)')
#
# Define the pipelines

4
tools/topology/sof-hda-asrc.m4
View File

@ -2,6 +2,10 @@
# Topology for SKL+ HDA for testing ASRC
#
# if XPROC is not defined, define with default pipe
ifdef(`DMICPROC', , `define(DMICPROC, eq-iir-volume)')
ifdef(`DMIC16KPROC', , `define(DMIC16KPROC, eq-iir-volume)')
# Include topology builder
include(`utils.m4')
include(`dai.m4')

4
tools/topology/sof-hda-generic-idisp.m4
View File

@ -2,6 +2,10 @@
# Topology for SKL+ HDA Generic machine w/ iDISP codec only
#
# if XPROC is not defined, define with default pipe
ifdef(`DMICPROC', , `define(DMICPROC, eq-iir-volume)')
ifdef(`DMIC16KPROC', , `define(DMIC16KPROC, eq-iir-volume)')
# Include topology builder
include(`utils.m4')
include(`dai.m4')

4
tools/topology/sof-hda-generic.m4
View File

@ -1,6 +1,10 @@
# Topology for SKL+ HDA Generic machine
#
# if XPROC is not defined, define with default pipe
ifdef(`DMICPROC', , `define(DMICPROC, eq-iir-volume)')
ifdef(`DMIC16KPROC', , `define(DMIC16KPROC, eq-iir-volume)')
# Include topology builder
include(`utils.m4')
include(`dai.m4')