diff --git a/src/platform/apollolake/apollolake.x.in b/src/platform/apollolake/apollolake.x.in
index 172abe3ac..53e7c1b86 100644
--- a/src/platform/apollolake/apollolake.x.in
+++ b/src/platform/apollolake/apollolake.x.in
@@ -9,11 +9,20 @@
 
 #include <platform/memory.h>
 #include <xtensa/config/core-isa.h>
+#include <config.h>
 
 OUTPUT_ARCH(xtensa)
 
 MEMORY
 {
+#if defined(CONFIG_SKYLAKE) || defined(CONFIG_KABYLAKE)
+  vector_reset_text :
+        org = HP_SRAM_VECBASE_RESET,
+        len = HP_SRAM_RESET_TEXT_SIZE
+  vector_reset_lit :
+        org = HP_SRAM_VECBASE_RESET + HP_SRAM_RESET_TEXT_SIZE,
+        len = HP_SRAM_RESET_LIT_SIZE
+#endif
   vector_memory_lit :
 	org = XCHAL_MEMERROR_VECTOR_PADDR + SOF_MEM_ERROR_LIT_SIZE,
         len = SOF_MEM_ERROR_LIT_SIZE
@@ -165,11 +174,13 @@ PHDRS
 }
 
 /*  Default entry point:  */
+#if !defined(CONFIG_SKYLAKE) && !defined(CONFIG_KABYLAKE)
 ENTRY(_MainEntry)
+#endif
 _rom_store_table = 0;
 
 /* ABI0 does not use Window base */
-PROVIDE(_memmap_vecbase_reset = HP_SRAM_VECBASE_RESET);
+PROVIDE(_memmap_vecbase_reset = SOF_MEM_VECBASE);
 
 /* Various memory-map dependent cache attribute settings: */
 _memmap_cacheattr_wbna_trapnull = 0xFF42FFF2;
@@ -231,6 +242,23 @@ SECTIONS
     _wnd3_end = ABSOLUTE(.);
   } >wnd3 :wnd3_phdr
 
+#if defined(CONFIG_SKYLAKE) || defined(CONFIG_KABYLAKE)
+ .ResetVector.text : ALIGN(4)
+  {
+    _ResetVector_text_start = ABSOLUTE(.);
+    KEEP (*(.ResetVector.text))
+    _ResetVector_text_end = ABSOLUTE(.);
+  } >vector_reset_text :vector_reset_text_phdr
+
+  .ResetVector.literal : ALIGN(4)
+  {
+    _ResetVector_literal_start = ABSOLUTE(.);
+    *(.ResetVector.literal)
+    _ResetVector_literal_end = ABSOLUTE(.);
+  } >vector_reset_lit :vector_reset_lit_phdr
+
+#endif
+
   .WindowVectors.text : ALIGN(4)
   {
     _WindowVectors_text_start = ABSOLUTE(.);
diff --git a/src/platform/apollolake/include/platform/memory.h b/src/platform/apollolake/include/platform/memory.h
index 7219d9006..60bcf2ade 100644
--- a/src/platform/apollolake/include/platform/memory.h
+++ b/src/platform/apollolake/include/platform/memory.h
@@ -215,9 +215,8 @@
  */
 
 /* HP SRAM */
-#define SRAM_ALIAS_OFFSET	0x20000000
+
 #define HP_SRAM_BASE		0xBE000000
-#define HP_SRAM_SIZE		0x00080000
 #define HP_SRAM_MASK		0xFF000000
 
 /* HP SRAM Heap */
@@ -231,7 +230,7 @@
 /* HP SRAM windows */
 
 /* window 3 */
-#define SRAM_TRACE_BASE		(HEAP_HP_BUFFER_BASE + HEAP_HP_BUFFER_SIZE)
+#define SRAM_TRACE_BASE		SRAM_WND_BASE
 #define SRAM_TRACE_SIZE		0x2000
 
 /* window 2 */
@@ -271,13 +270,45 @@
 #define HP_SRAM_WIN3_BASE	SRAM_TRACE_BASE
 #define HP_SRAM_WIN3_SIZE	SRAM_TRACE_SIZE
 
-#define HP_SRAM_VECBASE_RESET	(HP_SRAM_WIN0_BASE + HP_SRAM_WIN0_SIZE)
+/* Apollolake HP-SRAM config */
+#if defined(CONFIG_APOLLOLAKE) \
+	&& !(defined(CONFIG_KABYLAKE) || defined(CONFIG_SKYLAKE))
 
+#define SRAM_ALIAS_OFFSET	0x20000000
+
+#define HP_SRAM_SIZE		0x00080000
+
+#define SRAM_WND_BASE		(HEAP_HP_BUFFER_BASE + HEAP_HP_BUFFER_SIZE)
+
+#define HP_SRAM_VECBASE_RESET	(HP_SRAM_WIN0_BASE + HP_SRAM_WIN0_SIZE)
+#define HP_SRAM_VECBASE_OFFSET	0x0
 
 #define SOF_TEXT_START		(HP_SRAM_VECBASE_RESET + 0x400)
 #define SOF_TEXT_BASE		(SOF_TEXT_START)
 #define SOF_TEXT_SIZE		(0x1d000 - 0x400)
 
+/* Skylake or kabylake HP-SRAM config */
+#elif defined(CONFIG_KABYLAKE) || defined(CONFIG_SKYLAKE)
+
+#define SRAM_ALIAS_OFFSET	0x00000000
+
+#define HP_SRAM_SIZE		0x0001E0000
+
+#define SRAM_WND_BASE		0xBE058000
+
+#define HP_SRAM_VECBASE_RESET	0xBE0A0000
+#define HP_SRAM_VECBASE_OFFSET	0x800
+#define HP_SRAM_RESET_TEXT_SIZE	0x400
+#define HP_SRAM_RESET_LIT_SIZE	0x100
+
+#define SOF_TEXT_START		HP_SRAM_VECBASE_RESET
+#define SOF_TEXT_BASE		(SOF_TEXT_START + 0x1000)
+#define SOF_TEXT_SIZE		0x1c000
+
+#else
+#error Platform not specified
+#endif
+
 /* initialized data */
 #define SOF_DATA_START		(SOF_TEXT_BASE + SOF_TEXT_SIZE)
 #if defined CONFIG_DMIC
@@ -373,7 +404,8 @@
 #define SOF_MEM_ERROR_TEXT_SIZE	0x180
 #define SOF_MEM_ERROR_LIT_SIZE		0x8
 
-#define SOF_MEM_VECBASE			HP_SRAM_VECBASE_RESET
+#define SOF_MEM_VECBASE	\
+	(HP_SRAM_VECBASE_RESET + HP_SRAM_VECBASE_OFFSET)
 #define SOF_MEM_VECBASE_LIT_SIZE	0x178
 
 #define SOF_MEM_RO_SIZE		0x8
@@ -381,8 +413,17 @@
 /* VM ROM sizes */
 #define ROM_RESET_TEXT_SIZE	0x400
 #define ROM_RESET_LIT_SIZE	0x200
-/* boot loader in IMR */
+
+/* boot loader in IMR - APL uses manifest v1.8 and SKL/KBL use v1.5 */
+#if defined(CONFIG_APOLLOLAKE) \
+	&& !(defined(CONFIG_KABYLAKE) || defined(CONFIG_SKYLAKE))
 #define IMR_BOOT_LDR_TEXT_ENTRY_BASE	0xB000A000
+#elif defined(CONFIG_KABYLAKE) || defined(CONFIG_SKYLAKE)
+#define IMR_BOOT_LDR_TEXT_ENTRY_BASE	0xBE0A0000
+#else
+#error Platform not specified
+#endif
+
 #define IMR_BOOT_LDR_TEXT_ENTRY_SIZE	0x86
 #define IMR_BOOT_LDR_LIT_BASE		(IMR_BOOT_LDR_TEXT_ENTRY_BASE + \
 					IMR_BOOT_LDR_TEXT_ENTRY_SIZE)