topology: align cht-nocodec and byt-codec topologies

Additional work needed to make the BE name and index configuration, as
well as LBM quirk.
We should be using a single topology here.

Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
This commit is contained in:
Pierre-Louis Bossart 2020-06-27 13:05:01 -05:00 committed by Liam Girdwood
parent ec47eefa13
commit 1a56804ff7
2 changed files with 46 additions and 33 deletions

View File

@ -17,8 +17,8 @@ add_custom_target(abi
) )
set(TPLGS set(TPLGS
"sof-cht-nocodec\;sof-cht-nocodec\;-DPLATFORM=cht-nocodec" "sof-cht-nocodec\;sof-cht-nocodec\;-DPLATFORM=cht-nocodec\;-DSSP_NUM=2"
"sof-cht-nocodec\;sof-byt-nocodec\;-DPLATFORM=byt-nocodec" "sof-cht-nocodec\;sof-byt-nocodec\;-DPLATFORM=byt-nocodec\;-DSSP_NUM=2"
"sof-bdw-nocodec\;sof-bdw-nocodec" "sof-bdw-nocodec\;sof-bdw-nocodec"
"sof-cht-max98090\;sof-cht-max98090" "sof-cht-max98090\;sof-cht-max98090"
"sof-cht-rt5682\;sof-cht-rt5682" "sof-cht-rt5682\;sof-cht-rt5682"

View File

@ -1,9 +1,9 @@
`# Topology for generic' PLATFORM `board with no codec.' `# Topology for generic' PLATFORM `board with no codec.'
# Include topology builder # Include topology builder
include(`pipeline.m4')
include(`utils.m4') include(`utils.m4')
include(`dai.m4') include(`dai.m4')
include(`pipeline.m4')
include(`ssp.m4') include(`ssp.m4')
# Include TLV library # Include TLV library
@ -18,19 +18,11 @@ include(`platform/intel/'PLATFORM`.m4')
# #
# Define the pipelines # Define the pipelines
# #
# PCM0 ----> volume ---------------+ # PCM0 -----> volume -------v
# |--low latency mixer ----> volume ----> SSP2 (NoCodec) # low latency mixer ----> volume ----> SSP2
# PCM1 -----> volume ----> SRC ----+ # PCM1 -----> volume -------^
# PCM0 <---- Volume <---- SSP2
# #
# PCM0 <---- Volume <---- SSP2 (NoCodec)
#
# Low Latency playback pipeline 1 on PCM 0 using max 2 channels of s32le.
# 1000us deadline on core 0 with priority 1
PIPELINE_PCM_ADD(sof/pipe-low-latency-playback.m4,
1, 0, 2, s32le,
1000, 1, 0,
48000, 48000, 48000)
# Low Latency capture pipeline 2 on PCM 0 using max 2 channels of s32le. # Low Latency capture pipeline 2 on PCM 0 using max 2 channels of s32le.
# 1000us deadline on core 0 with priority 0 # 1000us deadline on core 0 with priority 0
@ -47,45 +39,66 @@ PIPELINE_PCM_ADD(sof/pipe-low-latency-capture.m4,
# playback DAI is SSP2 using 2 periods # playback DAI is SSP2 using 2 periods
# Buffers use s24le format, 1000us deadline on core 0 with priority 1 # Buffers use s24le format, 1000us deadline on core 0 with priority 1
DAI_ADD(sof/pipe-dai-playback.m4, # this defines pipeline 1. The 'NOT_USED_IGNORED' is due to dependencies
1, SSP, 2, NoCodec-2, # and is adjusted later with an explicit dapm line.
PIPELINE_SOURCE_1, 2, s24le, DAI_ADD(sof/pipe-mixer-dai-playback.m4,
1000, 1, 0, SCHEDULE_TIME_DOMAIN_DMA) 1, SSP, SSP_NUM, NoCodec-2,
NOT_USED_IGNORED, 2, s24le,
1000, 1, 0, SCHEDULE_TIME_DOMAIN_DMA,
2, 48000)
# PCM Media Playback pipeline 3 on PCM 1 using max 2 channels of s32le. # PCM Playback pipeline 3 on PCM 0 using max 2 channels of s32le.
# 4000us deadline on core 0 with priority 0 # 1000us deadline on core 0 with priority 0
PIPELINE_PCM_ADD(sof/pipe-pcm-media.m4, # this is connected to pipeline DAI 1
3, 1, 2, s32le, PIPELINE_PCM_ADD(sof/pipe-host-volume-playback.m4,
4000, 0, 0, 3, 0, 2, s32le,
8000, 48000, 48000, 1000, 0, 0,
SCHEDULE_TIME_DOMAIN_DMA, PIPELINE_PLAYBACK_SCHED_COMP_1) 48000, 48000, 48000,
SCHEDULE_TIME_DOMAIN_DMA,
PIPELINE_PLAYBACK_SCHED_COMP_1)
# PCM Playback pipeline 4 on PCM 1 using max 2 channels of s32le.
# 10ms deadline on core 0 with priority 0
# this is connected to pipeline DAI 1
PIPELINE_PCM_ADD(sof/pipe-host-volume-playback.m4,
4, 1, 2, s32le,
10000, 0, 0,
48000, 48000, 48000,
SCHEDULE_TIME_DOMAIN_DMA,
PIPELINE_PLAYBACK_SCHED_COMP_1)
# Connect pipelines together # Connect pipelines together
SectionGraph."media-pipe" { SectionGraph."PIPE_NAME" {
index "0" index "0"
lines [ lines [
# media 0 # PCM pipeline 3 to DAI pipeline 1
dapm(PIPELINE_MIXER_1, PIPELINE_SOURCE_3) dapm(PIPELINE_MIXER_1, PIPELINE_SOURCE_3)
# PCM pipeline 4 to DAI pipeline 1
dapm(PIPELINE_MIXER_1, PIPELINE_SOURCE_4)
] ]
} }
# capture DAI is SSP2 using 2 periods # capture DAI is SSP2 using 2 periods
# Buffers use s24le format, 1000us deadline on core 0 with priority 0 # Buffers use s24le format, 1000us deadline on core 0 with priority 0
# this is part of pipeline 2
DAI_ADD(sof/pipe-dai-capture.m4, DAI_ADD(sof/pipe-dai-capture.m4,
2, SSP, 2, NoCodec-2, 2, SSP, SSP_NUM, NoCodec-2,
PIPELINE_SINK_2, 2, s24le, PIPELINE_SINK_2, 2, s24le,
1000, 0, 0, SCHEDULE_TIME_DOMAIN_DMA) 1000, 0, 0, SCHEDULE_TIME_DOMAIN_DMA)
# PCM Low Latency
PCM_DUPLEX_ADD(Low Latency, 0, PIPELINE_PCM_1, PIPELINE_PCM_2) # PCM definitions
PCM_DUPLEX_ADD(PCM, 0, PIPELINE_PCM_3, PIPELINE_PCM_2)
PCM_PLAYBACK_ADD(PCM Deep Buffer, 1, PIPELINE_PCM_4)
# #
# BE configurations - overrides config in ACPI if present # BE configurations - overrides config in ACPI if present
# #
DAI_CONFIG(SSP, 2, 2, NoCodec-2, DAI_CONFIG(SSP, SSP_NUM, SSP_NUM, NoCodec-2,
SSP_CONFIG(I2S, SSP_CLOCK(mclk, 19200000, codec_mclk_in), SSP_CONFIG(I2S, SSP_CLOCK(mclk, 19200000, codec_mclk_in),
SSP_CLOCK(bclk, 2400000, codec_slave), SSP_CLOCK(bclk, 2400000, codec_slave),
SSP_CLOCK(fsync, 48000, codec_slave), SSP_CLOCK(fsync, 48000, codec_slave),
SSP_TDM(2, 25, 3, 3), SSP_TDM(2, 25, 3, 3),
SSP_CONFIG_DATA(SSP, 2, 24, 0, SSP_QUIRK_LBM))) SSP_CONFIG_DATA(SSP, SSP_NUM, 24, 0, SSP_QUIRK_LBM)))