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topology: ssp: mclk/bclk clock control 

Define the SSP_CC_MCLK/BCLK_ES bit to be used in SSP_CONFIG_DATA macro
to enable mclk/bclk on hw_params and disable malk/bclk on hw_free.

Signed-off-by: Brent Lu <brent.lu@intel.com>
Signed-off-by: Bard Liao <yung-chuan.liao@linux.intel.com>
This commit is contained in:
Brent Lu 2021-05-27 11:25:40 +08:00 committed by Liam Girdwood
parent 441b438191
commit 16878e387e
1 changed files with 5 additions and 0 deletions
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5
tools/topology/topology1/platform/common/ssp.m4
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@ -30,6 +30,11 @@ $6
dnl SSP_QUIRK_LBM 64 = (1 << 6)
define(`SSP_QUIRK_LBM', 64)
dnl SSP_CC_MCLK_ES 64 = (1 << 6)
define(`SSP_CC_MCLK_ES', 64)
dnl SSP_CC_BCLK_ES 128 = (1 << 7)
define(`SSP_CC_BCLK_ES', 128)
dnl SSP_CONFIG_DATA(type, idx, valid bits, mclk_id, quirks, bclk_delay,
dnl clks_control, pulse_width, padding)
dnl mclk_id, quirks, bclk_delay clks_control, pulse_width and padding are optional