From 14c4e867573096a00634e46975479591ec0257a9 Mon Sep 17 00:00:00 2001 From: Kai Vehmanen Date: Mon, 8 Apr 2024 16:39:11 +0300 Subject: [PATCH] audio: base_fw: add platform layer to IPC4 hw_config data Some of the IPC4 HW_CONFIG fields are platform specific and cannot be filled with generic code. Handle this functionality by separating platform specific parts of base_fw to a new base_fw_platform.h interface. Move out existing code for Intel cAVS and ACE platforms. Add a new stub implementation for posix platform. This posix stub can be also used as a starting point when adding IPC4 support to new platforms. This platform construct can be later used to move out other vendor and platform data out from base_fw.c. Signed-off-by: Kai Vehmanen --- src/audio/base_fw.c | 16 +++------- src/include/ipc4/base_fw_platform.h | 25 +++++++++++++++ src/platform/intel/ace/lib/base_fw_platform.c | 32 +++++++++++++++++++ src/platform/posix/base_fw_platform.c | 15 +++++++++ zephyr/CMakeLists.txt | 3 ++ 5 files changed, 80 insertions(+), 11 deletions(-) create mode 100644 src/include/ipc4/base_fw_platform.h create mode 100644 src/platform/intel/ace/lib/base_fw_platform.c create mode 100644 src/platform/posix/base_fw_platform.c diff --git a/src/audio/base_fw.c b/src/audio/base_fw.c index 85827ab6e..e4ddcb145 100644 --- a/src/audio/base_fw.c +++ b/src/audio/base_fw.c @@ -6,6 +6,7 @@ #include #include #include +#include #include #include #include @@ -141,6 +142,7 @@ static int basefw_config(uint32_t *data_offset, char *data) static int basefw_hw_config(uint32_t *data_offset, char *data) { struct sof_tlv *tuple = (struct sof_tlv *)data; + uint32_t plat_data_offset = 0; uint32_t value; tlv_value_uint32_set(tuple, IPC4_CAVS_VER_HW_CFG, HW_CFG_VERSION); @@ -159,19 +161,11 @@ static int basefw_hw_config(uint32_t *data_offset, char *data) tlv_value_uint32_set(tuple, IPC4_TOTAL_PHYS_MEM_PAGES_HW_CFG, value); tuple = tlv_next(tuple); - tlv_value_uint32_set(tuple, IPC4_HP_EBB_COUNT_HW_CFG, PLATFORM_HPSRAM_EBB_COUNT); - tuple = tlv_next(tuple); - /* 2 DMIC dais */ - value = DAI_NUM_SSP_BASE + DAI_NUM_HDA_IN + DAI_NUM_HDA_OUT + - DAI_NUM_ALH_BI_DIR_LINKS + 2; - tlv_value_uint32_set(tuple, IPC4_GATEWAY_COUNT_HW_CFG, value); + /* add platform specific tuples */ + platform_basefw_hw_config(&plat_data_offset, (char *)tuple); - tuple = tlv_next(tuple); - tlv_value_uint32_set(tuple, IPC4_LP_EBB_COUNT_HW_CFG, PLATFORM_LPSRAM_EBB_COUNT); - - tuple = tlv_next(tuple); - *data_offset = (int)((char *)tuple - data); + *data_offset = (int)((char *)tuple - data) + plat_data_offset; return 0; } diff --git a/src/include/ipc4/base_fw_platform.h b/src/include/ipc4/base_fw_platform.h new file mode 100644 index 000000000..717f9e337 --- /dev/null +++ b/src/include/ipc4/base_fw_platform.h @@ -0,0 +1,25 @@ +/* SPDX-License-Identifier: BSD-3-Clause + * + * Copyright(c) 2024 Intel Corporation. + * + * Author: Kai Vehmanen + */ + +/** + * \file include/ipc4/base_fw_platform.h + * \brief Platform specific IPC4 base firmware functionality. + */ + +#ifndef __SOF_IPC4_BASE_FW_PLATFORM_H__ +#define __SOF_IPC4_BASE_FW_PLATFORM_H__ + +/** + * \brief Platform specific routine to add data tuples to HW_CONFIG + * structure sent to host via IPC. + * \param[out] data_offset data offset after tuples added + * \parma[in] data pointer where to add new entries + * \return 0 if successful, error code otherwise. + */ +int platform_basefw_hw_config(uint32_t *data_offset, char *data); + +#endif diff --git a/src/platform/intel/ace/lib/base_fw_platform.c b/src/platform/intel/ace/lib/base_fw_platform.c new file mode 100644 index 000000000..3a7ff02b0 --- /dev/null +++ b/src/platform/intel/ace/lib/base_fw_platform.c @@ -0,0 +1,32 @@ +// SPDX-License-Identifier: BSD-3-Clause +// +// Copyright(c) 2024 Intel Corporation. +// +// Author: Kai Vehmanen + +#include +#include +#include +#include + +int platform_basefw_hw_config(uint32_t *data_offset, char *data) +{ + struct sof_tlv *tuple = (struct sof_tlv *)data; + uint32_t value; + + tlv_value_uint32_set(tuple, IPC4_HP_EBB_COUNT_HW_CFG, PLATFORM_HPSRAM_EBB_COUNT); + + tuple = tlv_next(tuple); + /* 2 DMIC dais */ + value = DAI_NUM_SSP_BASE + DAI_NUM_HDA_IN + DAI_NUM_HDA_OUT + + DAI_NUM_ALH_BI_DIR_LINKS + 2; + tlv_value_uint32_set(tuple, IPC4_GATEWAY_COUNT_HW_CFG, value); + + tuple = tlv_next(tuple); + tlv_value_uint32_set(tuple, IPC4_LP_EBB_COUNT_HW_CFG, PLATFORM_LPSRAM_EBB_COUNT); + + tuple = tlv_next(tuple); + *data_offset = (int)((char *)tuple - data); + + return 0; +} diff --git a/src/platform/posix/base_fw_platform.c b/src/platform/posix/base_fw_platform.c new file mode 100644 index 000000000..c398449e4 --- /dev/null +++ b/src/platform/posix/base_fw_platform.c @@ -0,0 +1,15 @@ +// SPDX-License-Identifier: BSD-3-Clause +// +// Copyright(c) 2024 Intel Corporation. +// +// Author: Kai Vehmanen + +#include +#include + +int platform_basefw_hw_config(uint32_t *data_offset, char *data) +{ + *data_offset = 0; + + return 0; +} diff --git a/zephyr/CMakeLists.txt b/zephyr/CMakeLists.txt index 5b3366292..97f20a1f7 100644 --- a/zephyr/CMakeLists.txt +++ b/zephyr/CMakeLists.txt @@ -163,6 +163,7 @@ if (CONFIG_SOC_SERIES_INTEL_CAVS_V25) # Platform sources zephyr_library_sources( ${SOF_PLATFORM_PATH}/intel/cavs/platform.c + ${SOF_PLATFORM_PATH}/intel/ace/lib/base_fw_platform.c ${SOF_PLATFORM_PATH}/tigerlake/lib/clk.c lib/pm_runtime.c lib/clk.c @@ -184,6 +185,7 @@ if (CONFIG_SOC_SERIES_INTEL_ADSP_ACE) # Platform sources zephyr_library_sources( ${SOF_PLATFORM_PATH}/intel/ace/platform.c + ${SOF_PLATFORM_PATH}/intel/ace/lib/base_fw_platform.c lib/pm_runtime.c lib/clk.c lib/dma.c @@ -346,6 +348,7 @@ zephyr_library_sources_ifdef(CONFIG_ZEPHYR_POSIX ${SOF_PLATFORM_PATH}/posix/dai.c ${SOF_PLATFORM_PATH}/posix/ipc.c ${SOF_PLATFORM_PATH}/posix/posix.c + ${SOF_PLATFORM_PATH}/posix/base_fw_platform.c ) zephyr_library_sources_ifdef(CONFIG_LIBRARY