diff --git a/src/lib/alloc.c b/src/lib/alloc.c index 81a29ba86..92b52756f 100644 --- a/src/lib/alloc.c +++ b/src/lib/alloc.c @@ -547,6 +547,10 @@ void rfree(void *ptr) if (!ptr) return; + /* operate only on cached addresses */ + if (is_uncached(ptr)) + ptr = uncache_to_cache(ptr); + /* use the heap dedicated for the selected core */ cpu_heap = cache_to_uncache(memmap.system + cpu_get_id()); diff --git a/src/platform/apollolake/include/platform/memory.h b/src/platform/apollolake/include/platform/memory.h index 7cebe9cff..18afe2f25 100644 --- a/src/platform/apollolake/include/platform/memory.h +++ b/src/platform/apollolake/include/platform/memory.h @@ -193,6 +193,7 @@ #define SRAM_ALIAS_OFFSET 0x20000000 #define HP_SRAM_BASE 0xBE000000 #define HP_SRAM_SIZE 0x00080000 +#define HP_SRAM_MASK 0xFF000000 /* HP SRAM Heap */ #define HEAP_HP_BUFFER_BASE HP_SRAM_BASE @@ -373,10 +374,11 @@ /** \brief Manifest size (seems unused). */ #define IMR_BOOT_LDR_MANIFEST_SIZE 0x6000 -#define SRAM_ALIAS_OFFSET 0x20000000 #define uncache_to_cache(address) \ ((__typeof__((address)))((uint32_t)((address)) + SRAM_ALIAS_OFFSET)) #define cache_to_uncache(address) \ ((__typeof__((address)))((uint32_t)((address)) - SRAM_ALIAS_OFFSET)) +#define is_uncached(address) \ + (((uint32_t)(address) & HP_SRAM_MASK) != HP_SRAM_BASE) #endif diff --git a/src/platform/baytrail/include/platform/memory.h b/src/platform/baytrail/include/platform/memory.h index 3658e1b5e..7daba8986 100644 --- a/src/platform/baytrail/include/platform/memory.h +++ b/src/platform/baytrail/include/platform/memory.h @@ -158,5 +158,6 @@ #define uncache_to_cache(address) address #define cache_to_uncache(address) address +#define is_uncached(address) 0 #endif diff --git a/src/platform/cannonlake/include/platform/memory.h b/src/platform/cannonlake/include/platform/memory.h index ad1f04a04..97f737669 100644 --- a/src/platform/cannonlake/include/platform/memory.h +++ b/src/platform/cannonlake/include/platform/memory.h @@ -173,6 +173,7 @@ #define SRAM_ALIAS_OFFSET 0x20000000 #define HP_SRAM_BASE 0xBE000000 #define HP_SRAM_SIZE 0x002F0000 +#define HP_SRAM_MASK 0xFF000000 /* HP SRAM Base */ #define HP_SRAM_VECBASE_RESET (HP_SRAM_BASE + 0x40000) @@ -383,10 +384,11 @@ #define IMR_BOOT_LDR_BSS_BASE 0xB0100000 #define IMR_BOOT_LDR_BSS_SIZE 0x10000 -#define SRAM_ALIAS_OFFSET 0x20000000 #define uncache_to_cache(address) \ ((__typeof__((address)))((uint32_t)((address)) + SRAM_ALIAS_OFFSET)) #define cache_to_uncache(address) \ ((__typeof__((address)))((uint32_t)((address)) - SRAM_ALIAS_OFFSET)) +#define is_uncached(address) \ + (((uint32_t)(address) & HP_SRAM_MASK) != HP_SRAM_BASE) #endif diff --git a/src/platform/haswell/include/platform/memory.h b/src/platform/haswell/include/platform/memory.h index d9187377d..9c8cb1988 100644 --- a/src/platform/haswell/include/platform/memory.h +++ b/src/platform/haswell/include/platform/memory.h @@ -155,5 +155,6 @@ #define uncache_to_cache(address) address #define cache_to_uncache(address) address +#define is_uncached(address) 0 #endif diff --git a/src/platform/icelake/include/platform/memory.h b/src/platform/icelake/include/platform/memory.h index 0d83e6588..357003fcd 100644 --- a/src/platform/icelake/include/platform/memory.h +++ b/src/platform/icelake/include/platform/memory.h @@ -173,6 +173,7 @@ #define SRAM_ALIAS_OFFSET 0x20000000 #define HP_SRAM_BASE 0xBE000000 #define HP_SRAM_SIZE 0x002F0000 +#define HP_SRAM_MASK 0xFF000000 /* HP SRAM Base */ #define HP_SRAM_VECBASE_RESET (HP_SRAM_BASE + 0x40000) @@ -383,10 +384,11 @@ #define IMR_BOOT_LDR_BSS_BASE 0xB0100000 #define IMR_BOOT_LDR_BSS_SIZE 0x10000 -#define SRAM_ALIAS_OFFSET 0x20000000 #define uncache_to_cache(address) \ ((__typeof__((address)))((uint32_t)((address)) + SRAM_ALIAS_OFFSET)) #define cache_to_uncache(address) \ ((__typeof__((address)))((uint32_t)((address)) - SRAM_ALIAS_OFFSET)) +#define is_uncached(address) \ + (((uint32_t)(address) & HP_SRAM_MASK) != HP_SRAM_BASE) #endif diff --git a/src/platform/suecreek/include/platform/memory.h b/src/platform/suecreek/include/platform/memory.h index 6456be6e6..d109caab9 100644 --- a/src/platform/suecreek/include/platform/memory.h +++ b/src/platform/suecreek/include/platform/memory.h @@ -161,6 +161,7 @@ #define SRAM_ALIAS_OFFSET 0x20000000 #define HP_SRAM_BASE 0xBE000000 #define HP_SRAM_SIZE 0x002F0000 /* Should be 48 * 64 - 0x300000 ?? */ +#define HP_SRAM_MASK 0xFF000000 /* HP SRAM Base */ #define HP_SRAM_VECBASE_RESET (HP_SRAM_BASE + 0x40000) @@ -349,10 +350,11 @@ #define SRAM_VECBASE_RESET (BOOT_LDR_BSS_BASE + BOOT_LDR_BSS_SIZE) //TODO: confirm mapping -#define SRAM_ALIAS_OFFSET 0x20000000 #define uncache_to_cache(address) \ ((__typeof__((address)))((uint32_t)((address)) + SRAM_ALIAS_OFFSET)) #define cache_to_uncache(address) \ ((__typeof__((address)))((uint32_t)((address)) - SRAM_ALIAS_OFFSET)) +#define is_uncached(address) \ + (((uint32_t)(address) & HP_SRAM_MASK) != HP_SRAM_BASE) #endif