mirror of https://github.com/thesofproject/sof.git
kconfig: rename HW_LLI to DMA_HW_LLI
Add a proper namespace prefix to CONFIG_HW_LLI. While this option is only used by DW-DMA driver at the moment, this is a generic option, so remove the DW-DMA specific text from top-level documentation. Signed-off-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
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79c647542d
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4
Kconfig
4
Kconfig
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@ -42,11 +42,11 @@ config INTEL_IOMUX
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bool
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default n
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config HW_LLI
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config DMA_HW_LLI
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bool
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default n
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help
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Hardware linked list is the DW-DMA feature, which allows
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Hardware linked list is DMA feature, which allows
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to automatically reload the next programmed linked list
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item from memory without stopping the transfer. Without
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it the transfer stops after every lli read and FW needs
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@ -73,7 +73,7 @@ struct dw_dma_chan_data {
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*/
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static const uint32_t burst_elems[] = {1, 2, 4, 8};
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#if CONFIG_HW_LLI
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#if CONFIG_DMA_HW_LLI
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#define DW_DMA_BUFFER_PERIOD_COUNT 4
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#else
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#define DW_DMA_BUFFER_PERIOD_COUNT 2
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@ -93,7 +93,7 @@ static void dw_dma_interrupt_mask(struct dma_chan_data *channel)
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static void dw_dma_interrupt_unmask(struct dma_chan_data *channel)
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{
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/* unmask block, transfer and error interrupts for channel */
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#if CONFIG_HW_LLI
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#if CONFIG_DMA_HW_LLI
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dma_reg_write(channel->dma, DW_MASK_BLOCK,
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DW_CHAN_UNMASK(channel->index));
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#else
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@ -118,7 +118,7 @@ static uint32_t dw_dma_interrupt_status(struct dma_chan_data *channel)
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{
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uint32_t status;
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#if CONFIG_HW_LLI
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#if CONFIG_DMA_HW_LLI
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status = dma_reg_read(channel->dma, DW_STATUS_BLOCK);
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#else
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status = dma_reg_read(channel->dma, DW_STATUS_TFR);
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@ -135,7 +135,7 @@ static void dw_dma_increment_pointer(struct dw_dma_chan_data *chan, int bytes)
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(chan->ptr_data.current_ptr - chan->ptr_data.end_ptr);
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}
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#if !CONFIG_HW_LLI
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#if !CONFIG_DMA_HW_LLI
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/* reload using LLI data from DMA IRQ cb */
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static inline void dw_dma_chan_reload_lli_cb(void *arg, enum notify_id type,
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void *data)
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@ -202,7 +202,7 @@ static struct dma_chan_data *dw_dma_channel_get(struct dma *dma,
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dma->chan[i].status = COMP_STATE_READY;
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atomic_add(&dma->num_channels_busy, 1);
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#if !CONFIG_HW_LLI
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#if !CONFIG_DMA_HW_LLI
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notifier_register(&dma->chan[i], &dma->chan[i],
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NOTIFIER_ID_DMA_IRQ, dw_dma_chan_reload_lli_cb, 0);
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#endif
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@ -265,7 +265,7 @@ static int dw_dma_start(struct dma_chan_data *channel)
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struct dw_lli *lli = dw_chan->lli_current;
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uint32_t flags;
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int ret = 0;
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#if CONFIG_HW_LLI
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#if CONFIG_DMA_HW_LLI
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uint32_t words_per_tfr = 0;
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#endif
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@ -294,7 +294,7 @@ static int dw_dma_start(struct dma_chan_data *channel)
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goto out;
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}
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#if CONFIG_HW_LLI
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#if CONFIG_DMA_HW_LLI
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/* LLP mode - write LLP pointer unless in scatter mode */
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dma_reg_write(dma, DW_LLP(channel->index),
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(lli->ctrl_lo & (DW_CTLL_LLP_D_EN | DW_CTLL_LLP_S_EN)) ?
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@ -312,7 +312,7 @@ static int dw_dma_start(struct dma_chan_data *channel)
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dma_reg_write(dma, DW_CFG_LOW(channel->index), dw_chan->cfg_lo);
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dma_reg_write(dma, DW_CFG_HIGH(channel->index), dw_chan->cfg_hi);
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#if CONFIG_HW_LLI
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#if CONFIG_DMA_HW_LLI
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if (lli->ctrl_lo & DW_CTLL_D_SCAT_EN) {
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words_per_tfr = (lli->ctrl_hi & DW_CTLH_BLOCK_TS_MASK) >>
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((lli->ctrl_lo & DW_CTLL_DST_WIDTH_MASK) >>
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@ -391,11 +391,11 @@ static int dw_dma_stop(struct dma_chan_data *channel)
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struct dma *dma = channel->dma;
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uint32_t flags;
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#if CONFIG_HW_LLI || CONFIG_DMA_SUSPEND_DRAIN
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#if CONFIG_DMA_HW_LLI || CONFIG_DMA_SUSPEND_DRAIN
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struct dw_dma_chan_data *dw_chan = dma_chan_get_data(channel);
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#endif
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#if CONFIG_HW_LLI
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#if CONFIG_DMA_HW_LLI
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struct dw_lli *lli = dw_chan->lli;
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int i;
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#endif
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@ -432,7 +432,7 @@ static int dw_dma_stop(struct dma_chan_data *channel)
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dma_reg_write(dma, DW_DMA_CHAN_EN, DW_CHAN_MASK(channel->index));
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#if CONFIG_HW_LLI
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#if CONFIG_DMA_HW_LLI
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for (i = 0; i < channel->desc_count; i++) {
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lli->ctrl_hi &= ~DW_CTLH_DONE(1);
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lli++;
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@ -659,7 +659,7 @@ static int dw_dma_set_config(struct dma_chan_data *channel,
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case DMA_DIR_LMEM_TO_HMEM:
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lli_desc->ctrl_lo |= DW_CTLL_FC_M2M | DW_CTLL_SRC_INC |
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DW_CTLL_DST_INC;
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#if CONFIG_HW_LLI
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#if CONFIG_DMA_HW_LLI
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lli_desc->ctrl_lo |=
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DW_CTLL_LLP_S_EN | DW_CTLL_LLP_D_EN;
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#endif
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@ -667,7 +667,7 @@ static int dw_dma_set_config(struct dma_chan_data *channel,
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case DMA_DIR_HMEM_TO_LMEM:
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lli_desc->ctrl_lo |= DW_CTLL_FC_M2M | DW_CTLL_SRC_INC |
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DW_CTLL_DST_INC;
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#if CONFIG_HW_LLI
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#if CONFIG_DMA_HW_LLI
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lli_desc->ctrl_lo |=
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DW_CTLL_LLP_S_EN | DW_CTLL_LLP_D_EN;
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#endif
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@ -675,7 +675,7 @@ static int dw_dma_set_config(struct dma_chan_data *channel,
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case DMA_DIR_MEM_TO_MEM:
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lli_desc->ctrl_lo |= DW_CTLL_FC_M2M | DW_CTLL_SRC_INC |
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DW_CTLL_DST_INC;
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#if CONFIG_HW_LLI
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#if CONFIG_DMA_HW_LLI
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lli_desc->ctrl_lo |=
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DW_CTLL_LLP_S_EN | DW_CTLL_LLP_D_EN;
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#endif
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@ -683,7 +683,7 @@ static int dw_dma_set_config(struct dma_chan_data *channel,
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case DMA_DIR_MEM_TO_DEV:
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lli_desc->ctrl_lo |= DW_CTLL_FC_M2P | DW_CTLL_SRC_INC |
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DW_CTLL_DST_FIX;
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#if CONFIG_HW_LLI
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#if CONFIG_DMA_HW_LLI
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lli_desc->ctrl_lo |= DW_CTLL_LLP_S_EN;
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dw_chan->cfg_lo |= DW_CFG_RELOAD_DST;
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#endif
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@ -694,7 +694,7 @@ static int dw_dma_set_config(struct dma_chan_data *channel,
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case DMA_DIR_DEV_TO_MEM:
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lli_desc->ctrl_lo |= DW_CTLL_FC_P2M | DW_CTLL_SRC_FIX |
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DW_CTLL_DST_INC;
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#if CONFIG_HW_LLI
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#if CONFIG_DMA_HW_LLI
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if (!config->scatter)
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lli_desc->ctrl_lo |= DW_CTLL_LLP_D_EN;
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else
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@ -711,7 +711,7 @@ static int dw_dma_set_config(struct dma_chan_data *channel,
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case DMA_DIR_DEV_TO_DEV:
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lli_desc->ctrl_lo |= DW_CTLL_FC_P2P | DW_CTLL_SRC_FIX |
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DW_CTLL_DST_FIX;
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#if CONFIG_HW_LLI
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#if CONFIG_DMA_HW_LLI
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lli_desc->ctrl_lo |=
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DW_CTLL_LLP_S_EN | DW_CTLL_LLP_D_EN;
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#endif
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@ -752,7 +752,7 @@ static int dw_dma_set_config(struct dma_chan_data *channel,
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lli_desc++;
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}
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#if CONFIG_HW_LLI
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#if CONFIG_DMA_HW_LLI
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dw_chan->cfg_lo |= DW_CFG_CTL_HI_UPD_EN;
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#endif
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@ -761,7 +761,7 @@ static int dw_dma_set_config(struct dma_chan_data *channel,
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lli_desc_tail->llp = (uint32_t)lli_desc_head;
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} else {
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lli_desc_tail->llp = 0;
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#if CONFIG_HW_LLI
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#if CONFIG_DMA_HW_LLI
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lli_desc_tail->ctrl_lo &=
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~(DW_CTLL_LLP_S_EN | DW_CTLL_LLP_D_EN);
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#endif
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@ -806,7 +806,7 @@ static void dw_dma_verify_transfer(struct dma_chan_data *channel,
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struct dma_cb_data *next)
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{
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struct dw_dma_chan_data *dw_chan = dma_chan_get_data(channel);
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#if CONFIG_HW_LLI
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#if CONFIG_DMA_HW_LLI
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#if defined __ZEPHYR__
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int i;
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#else
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@ -1094,7 +1094,7 @@ static int dw_dma_get_data_size(struct dma_chan_data *channel,
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}
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spin_unlock_irq(&channel->dma->lock, flags);
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#if CONFIG_HW_LLI
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#if CONFIG_DMA_HW_LLI
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if (!(dma_reg_read(channel->dma, DW_DMA_CHAN_EN) &
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DW_CHAN(channel->index))) {
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tr_err(&dwdma_tr, "dw_dma_get_data_size(): xrun detected");
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@ -78,7 +78,7 @@ config APOLLOLAKE
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select DW
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select DW_DMA
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select MEM_WND
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select HW_LLI
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select DMA_HW_LLI
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select DMA_FIFO_PARTITION
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select CAVS
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select CAVS_VERSION_1_5
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@ -93,7 +93,7 @@ config CANNONLAKE
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select DW
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select DW_DMA
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select MEM_WND
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select HW_LLI
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select DMA_HW_LLI
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select DW_DMA_AGGREGATED_IRQ
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select DMA_FIFO_PARTITION
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select CAVS
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@ -112,7 +112,7 @@ config SUECREEK
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select DW_SPI
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select INTEL_IOMUX
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select DW_GPIO
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select HW_LLI
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select DMA_HW_LLI
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select DW_DMA_AGGREGATED_IRQ
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select DMA_FIFO_PARTITION
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select CAVS
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@ -130,7 +130,7 @@ config ICELAKE
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select DW
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select DW_DMA
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select MEM_WND
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select HW_LLI
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select DMA_HW_LLI
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select DW_DMA_AGGREGATED_IRQ
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select DMA_FIFO_PARTITION
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select CAVS
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@ -148,7 +148,7 @@ config TIGERLAKE
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select DW
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select DW_DMA
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select MEM_WND
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select HW_LLI
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select DMA_HW_LLI
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select DW_DMA_AGGREGATED_IRQ
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select DMA_FIFO_PARTITION
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select CAVS
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