OrgACRN
/
sof
mirror of https://github.com/thesofproject/sof.git
1
0
Fork 0
Code Issues Projects Releases Wiki Activity

drivers: imx: sai: set SAI watermark only once 

Set SAI watermark only once, on sai_set_config().
There is no need to set it each time, on start().

SAI watermark is kept on half FIFO size.

Signed-off-by: Iuliana Prodan <iuliana.prodan@nxp.com>
This commit is contained in:
Iuliana Prodan 2021-03-04 13:01:59 +02:00 committed by Daniel Baluta
parent 1fa1001e24
commit 0d20c6c7a7
1 changed files with 8 additions and 3 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

11
src/drivers/imx/sai.c
View File

@ -50,9 +50,7 @@ static void sai_start(struct dai *dai, int direction)
/* transmitter enable */
dai_update_bits(dai, REG_SAI_XCSR(direction),
REG_SAI_CSR_TERE, REG_SAI_CSR_TERE);
/* TODO: for the time being use half FIFO size as watermark */
dai_update_bits(dai, REG_SAI_XCR1(direction),
REG_SAI_CR1_RFW_MASK, SAI_FIFO_WORD_SIZE / 2);
dai_update_bits(dai, REG_SAI_XCR3(direction),
REG_SAI_CR3_TRCE_MASK, REG_SAI_CR3_TRCE(1));
@ -255,6 +253,9 @@ static inline int sai_set_config(struct dai *dai,
mask_cr5 = REG_SAI_CR5_WNW_MASK | REG_SAI_CR5_W0W_MASK |
REG_SAI_CR5_FBT_MASK;
/* TODO: for the time being use half FIFO size as watermark */
dai_update_bits(dai, REG_SAI_XCR1(REG_TX_DIR),
REG_SAI_CR1_RFW_MASK, SAI_FIFO_WORD_SIZE / 2);
dai_update_bits(dai, REG_SAI_XCR2(REG_TX_DIR), mask_cr2, val_cr2);
dai_update_bits(dai, REG_SAI_XCR4(REG_TX_DIR), mask_cr4, val_cr4);
dai_update_bits(dai, REG_SAI_XCR5(REG_TX_DIR), mask_cr5, val_cr5);
@ -264,6 +265,10 @@ static inline int sai_set_config(struct dai *dai,
val_cr2 |= REG_SAI_CR2_SYNC;
mask_cr2 |= REG_SAI_CR2_SYNC_MASK;
/* TODO: for the time being use half FIFO size as watermark */
dai_update_bits(dai, REG_SAI_XCR1(REG_RX_DIR),
REG_SAI_CR1_RFW_MASK, SAI_FIFO_WORD_SIZE / 2);
dai_update_bits(dai, REG_SAI_XCR2(REG_RX_DIR), mask_cr2, val_cr2);
dai_update_bits(dai, REG_SAI_XCR4(REG_RX_DIR), mask_cr4, val_cr4);
dai_update_bits(dai, REG_SAI_XCR5(REG_RX_DIR), mask_cr5, val_cr5);