From 0cc866fde1291144b464133949669de53062dbec Mon Sep 17 00:00:00 2001
From: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
Date: Thu, 12 Apr 2018 21:13:38 -0500
Subject: [PATCH] apl-ssp: allow for 19.2 MHz SSP reference

Don't hard-code MCLK source on ApolloLake, use settings provided over
IPC to select 24.576 MHz PLL or 19.2 MHz XTAL oscillator.

Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
---
 src/drivers/apl-ssp.c | 12 +++++++++++-
 1 file changed, 11 insertions(+), 1 deletion(-)

diff --git a/src/drivers/apl-ssp.c b/src/drivers/apl-ssp.c
index 3a97cb80c..8f9bc1489 100644
--- a/src/drivers/apl-ssp.c
+++ b/src/drivers/apl-ssp.c
@@ -479,7 +479,17 @@ static inline int ssp_set_config(struct dai *dai,
 #ifdef CONFIG_CANNONLAKE
 	mdivc = 0x1;
 #else
-	mdivc = 0x00100001;
+	if (config->ssp.mclk_rate == 24576000) {
+		/* enable PLL, bypass M/N dividers */
+		mdivc = 0x00100001;
+	} else if (config->ssp.mclk_rate == 19200000) {
+		/* no PLL, use XTAl oscillator as source */
+		mdivc = 0;
+	} else {
+		trace_ssp_error("eci");
+		ret = -EINVAL;
+		goto out;
+	}
 #endif
 	/* bypass divider for MCLK */
 	mdivr = 0x00000fff;