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drivers:amd:four channel dmic configurations 

configurations to support dmic for four channels for amd
platforms.

Signed-off-by: MARUTHI MACHANI <maruthi.machani@amd.com>
This commit is contained in:
MARUTHI MACHANI 2022-10-19 16:41:32 +05:30 committed by Liam Girdwood
parent 2a8fd7d206
commit 07d401af9d
5 changed files with 72 additions and 21 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

22
src/arch/xtensa/configs/rembrandt_defconfig
View File

@ -10,15 +10,29 @@ CONFIG_HP_MEMORY_BANKS=10
CONFIG_FORMAT_CONVERT_HIFI3=n
CONFIG_LP_SRAM=n
CONFIG_HAVE_AGENT=n
CONFIG_COMP_VOLUME=n
CONFIG_COMP_BLOB=n
CONFIG_COMP_SRC=n
CONFIG_COMP_FIR=n
CONFIG_COMP_IIR=n
CONFIG_COMP_DCBLOCK=n
CONFIG_COMP_TDFB=n
CONFIG_COMP_CROSSOVER=n
CONFIG_COMP_DRC=n
CONFIG_COMP_MULTIBAND_DRC=n
CONFIG_COMP_TONE=n
CONFIG_COMP_MIXER=n
CONFIG_COMP_MUX=n
CONFIG_COMP_SWITCH=n
CONFIG_COMP_KPB=n
CONFIG_COMP_SEL=n
CONFIG_MAXIM_DSM=n
CONFIG_COMP_ASRC=n
CONFIG_COMP_MODULE_ADAPTER=n
CONFIG_COMP_IGO_NR=n
CONFIG_COMP_COPIER=n
CONFIG_COMP_RTNR=n
CONFIG_COMP_ARIA=n
CONFIG_COMP_BASEFW_IPC4=n
CONFIG_COMP_UP_DOWN_MIXER=n
CONFIG_COMP_DCBLOCK=n
CONFIG_COMP_TDFB=n
##CONFIG_COMP_MUX=n
CONFIG_COMP_SEL=n
CONFIG_COMP_MIXER=n

31
src/drivers/amd/rembrandt/acp_dmic_dai.c
View File

@ -27,6 +27,7 @@ DECLARE_TR_CTX(acp_dmic_dai_tr, SOF_UUID(acp_dmic_dai_uuid), LOG_LEVEL_INFO);
static inline int acp_dmic_dai_set_config(struct dai *dai, struct ipc_config_dai *common_config,
void *spec_config)
{
acp_wov_pdm_no_of_channels_t pdm_channels;
struct sof_ipc_dai_config *config = spec_config;
struct acp_pdata *acpdata = dai_get_drvdata(dai);
acp_wov_clk_ctrl_t clk_ctrl;
@ -35,6 +36,7 @@ static inline int acp_dmic_dai_set_config(struct dai *dai, struct ipc_config_dai
acpdata->dmic_params = config->acpdmic;
clk_ctrl = (acp_wov_clk_ctrl_t)io_reg_read(PU_REGISTER_BASE + ACP_WOV_PDM_DMA_ENABLE);
clk_ctrl.u32all = 0;
pdm_channels.u32all = io_reg_read(PU_REGISTER_BASE + ACP_WOV_PDM_NO_OF_CHANNELS);
switch (acpdata->dmic_params.pdm_rate) {
case 48000:
/* DMIC Clock for 48K sample rate */
@ -45,10 +47,23 @@ static inline int acp_dmic_dai_set_config(struct dai *dai, struct ipc_config_dai
clk_ctrl.bits.brm_clk_ctrl = 1;
break;
default:
dai_info(dai, "unsupported samplerate");
dai_err(dai, "unsupported samplerate");
return -EINVAL;
}
io_reg_write(PU_REGISTER_BASE + ACP_WOV_CLK_CTRL, clk_ctrl.u32all);
switch (acpdata->dmic_params.pdm_ch) {
case 2:
pdm_channels.bits.pdm_no_of_channels = 0;
break;
case 4:
pdm_channels.bits.pdm_no_of_channels = 1;
break;
default:
dai_err(dai, "acp_dmic_set_config unsupported channels");
return -EINVAL;
}
io_reg_write(PU_REGISTER_BASE + ACP_WOV_PDM_NO_OF_CHANNELS,
pdm_channels.u32all);
return 0;
}
@ -117,10 +132,18 @@ static int acp_dmic_dai_get_hw_params(struct dai *dai,
params->rate = acpdata->dmic_params.pdm_rate;
break;
default:
dai_info(dai, "unsupported samplerate %d", acpdata->dmic_params.pdm_rate);
params->rate = ACP_DEFAULT_SAMPLE_RATE;
dai_err(dai, "unsupported samplerate %d", acpdata->dmic_params.pdm_rate);
return -EINVAL;
}
switch (acpdata->dmic_params.pdm_ch) {
case 2:
case 4:
params->channels = acpdata->dmic_params.pdm_ch;
break;
default:
dai_err(dai, "unsupported channels %d", acpdata->dmic_params.pdm_ch);
return -EINVAL;
}
params->channels = ACP_DEFAULT_NUM_CHANNELS;
params->buffer_fmt = SOF_IPC_BUFFER_INTERLEAVED;
params->frame_fmt = SOF_IPC_FRAME_S32_LE;
return 0;

5
src/drivers/amd/rembrandt/acp_dmic_dma.c
View File

@ -78,7 +78,6 @@ static void acp_dmic_dma_channel_put(struct dma_chan_data *channel)
static int acp_dmic_dma_start(struct dma_chan_data *channel)
{
acp_wov_pdm_no_of_channels_t pdm_channels;
acp_wov_pdm_decimation_factor_t deci_fctr;
acp_wov_misc_ctrl_t wov_misc_ctrl;
acp_wov_pdm_dma_enable_t pdm_dma_enable;
@ -100,10 +99,6 @@ static int acp_dmic_dma_start(struct dma_chan_data *channel)
}
channel->status = COMP_STATE_ACTIVE;
if (channel->direction == DMA_DIR_DEV_TO_MEM) {
/* Channel for DMIC */
pdm_channels.bits.pdm_no_of_channels = 0;
io_reg_write(PU_REGISTER_BASE + ACP_WOV_PDM_NO_OF_CHANNELS,
pdm_channels.u32all);
/* Decimation Factor */
deci_fctr.u32all = 2;
io_reg_write(PU_REGISTER_BASE + ACP_WOV_PDM_DECIMATION_FACTOR,

31
src/drivers/amd/renoir/acp_dmic_dai.c
View File

@ -29,6 +29,7 @@ static inline int acp_dmic_dai_set_config(struct dai *dai, struct ipc_config_dai
void *spec_config)
{
dai_info(dai, "ACP: acp_dmic_set_config");
acp_wov_pdm_no_of_channels_t pdm_channels;
struct sof_ipc_dai_config *config = spec_config;
struct acp_pdata *acpdata = dai_get_drvdata(dai);
acp_wov_clk_ctrl_t clk_ctrl;
@ -37,6 +38,7 @@ static inline int acp_dmic_dai_set_config(struct dai *dai, struct ipc_config_dai
acpdata->dmic_params = config->acpdmic;
clk_ctrl = (acp_wov_clk_ctrl_t)io_reg_read(PU_REGISTER_BASE + ACP_WOV_PDM_DMA_ENABLE);
clk_ctrl.u32all = 0;
pdm_channels.u32all = io_reg_read(PU_REGISTER_BASE + ACP_WOV_PDM_NO_OF_CHANNELS);
switch (acpdata->dmic_params.pdm_rate) {
case 48000:
/* DMIC Clock for 48K sample rate */
@ -47,10 +49,23 @@ static inline int acp_dmic_dai_set_config(struct dai *dai, struct ipc_config_dai
clk_ctrl.bits.brm_clk_ctrl = 1;
break;
default:
dai_info(dai, "ACP:acp_dmic_set_config unsupported samplerate");
dai_err(dai, "ACP:acp_dmic_set_config unsupported samplerate");
return -EINVAL;
}
io_reg_write(PU_REGISTER_BASE + ACP_WOV_CLK_CTRL, clk_ctrl.u32all);
switch (acpdata->dmic_params.pdm_ch) {
case 2:
pdm_channels.bits.pdm_no_of_channels = 0;
break;
case 4:
pdm_channels.bits.pdm_no_of_channels = 1;
break;
default:
dai_err(dai, "ACP:acp_dmic_set_config unsupported channels");
return -EINVAL;
}
io_reg_write(PU_REGISTER_BASE + ACP_WOV_PDM_NO_OF_CHANNELS,
pdm_channels.u32all);
return 0;
}
@ -121,10 +136,18 @@ static int acp_dmic_dai_get_hw_params(struct dai *dai,
params->rate = acpdata->dmic_params.pdm_rate;
break;
default:
dai_info(dai, "ACP:unsupported samplerate %d", acpdata->dmic_params.pdm_rate);
params->rate = ACP_DEFAULT_SAMPLE_RATE;
dai_err(dai, "ACP:unsupported samplerate %d", acpdata->dmic_params.pdm_rate);
return -EINVAL;
}
switch (acpdata->dmic_params.pdm_ch) {
case 2:
case 4:
params->channels = acpdata->dmic_params.pdm_ch;
break;
default:
dai_err(dai, "ACP:unsupported channels %d", acpdata->dmic_params.pdm_ch);
return -EINVAL;
}
params->channels = ACP_DEFAULT_NUM_CHANNELS;
params->buffer_fmt = SOF_IPC_BUFFER_INTERLEAVED;
params->frame_fmt = SOF_IPC_FRAME_S32_LE;
return 0;

4
src/drivers/amd/renoir/acp_dmic_dma.c
View File

@ -78,7 +78,6 @@ static void acp_dmic_dma_channel_put(struct dma_chan_data *channel)
static int acp_dmic_dma_start(struct dma_chan_data *channel)
{
acp_wov_pdm_no_of_channels_t pdm_channels;
acp_wov_pdm_decimation_factor_t deci_fctr;
acp_wov_misc_ctrl_t wov_misc_ctrl;
acp_wov_pdm_dma_enable_t pdm_dma_enable;
@ -102,9 +101,6 @@ static int acp_dmic_dma_start(struct dma_chan_data *channel)
channel->status = COMP_STATE_ACTIVE;
if (channel->direction == DMA_DIR_DEV_TO_MEM) {
/* Channel for DMIC */
pdm_channels.bits.pdm_no_of_channels = 0;
io_reg_write(PU_REGISTER_BASE + ACP_WOV_PDM_NO_OF_CHANNELS,
pdm_channels.u32all);
/* Decimation Factor */
deci_fctr.u32all = 2;
io_reg_write(PU_REGISTER_BASE + ACP_WOV_PDM_DECIMATION_FACTOR,