dw-dma: make DMA FIFO partitioning configurable from Kconfig

Makes DMA FIFO partitioning configurable from Kconfig.
Some platforms need to set FIFO partitions before
enabling DMA controller.

Signed-off-by: Tomasz Lauda <tomasz.lauda@linux.intel.com>
This commit is contained in:
Tomasz Lauda 2019-04-16 15:59:02 +02:00 committed by Liam Girdwood
parent 1edaef67f4
commit 06e9a34583
3 changed files with 17 additions and 3 deletions

10
Kconfig
View File

@ -80,6 +80,16 @@ config DMA_SUSPEND_DRAIN
Any platforms without the ability to disable Any platforms without the ability to disable
the DMA channel right away should set this. the DMA channel right away should set this.
config DMA_FIFO_PARTITION
bool
default n
help
Some platforms require to manually set DMA
FIFO partitions before starting any transfer.
Any platforms without automatic FIFO partitions
should set this.
source "src/Kconfig" source "src/Kconfig"
menu "Debug" menu "Debug"

View File

@ -191,7 +191,6 @@
#define DW_CFGH_DST_PER(x) ((x) << 4) #define DW_CFGH_DST_PER(x) ((x) << 4)
/* FIFO Partition */ /* FIFO Partition */
#define DW_FIFO_PARTITION
#define DW_FIFO_PART0_LO 0x0400 #define DW_FIFO_PART0_LO 0x0400
#define DW_FIFO_PART0_HI 0x0404 #define DW_FIFO_PART0_HI 0x0404
#define DW_FIFO_PART1_LO 0x0408 #define DW_FIFO_PART1_LO 0x0408
@ -231,7 +230,6 @@
#endif #endif
/* FIFO Partition */ /* FIFO Partition */
#define DW_FIFO_PARTITION
#define DW_FIFO_PART0_LO 0x0400 #define DW_FIFO_PART0_LO 0x0400
#define DW_FIFO_PART0_HI 0x0404 #define DW_FIFO_PART0_HI 0x0404
#define DW_FIFO_PART1_LO 0x0408 #define DW_FIFO_PART1_LO 0x0408
@ -1163,7 +1161,7 @@ static int dw_dma_setup(struct dma *dma)
dw_write(dma, DW_MASK_DST_TRAN, INT_MASK_ALL); dw_write(dma, DW_MASK_DST_TRAN, INT_MASK_ALL);
dw_write(dma, DW_MASK_ERR, INT_MASK_ALL); dw_write(dma, DW_MASK_ERR, INT_MASK_ALL);
#ifdef DW_FIFO_PARTITION #if CONFIG_DMA_FIFO_PARTITION
/* TODO: we cannot config DMA FIFOs if DMAC has been already */ /* TODO: we cannot config DMA FIFOs if DMAC has been already */
/* allocate FIFO partitions, 128 bytes for each ch */ /* allocate FIFO partitions, 128 bytes for each ch */
dw_write(dma, DW_FIFO_PART1_LO, 0x100080); dw_write(dma, DW_FIFO_PART1_LO, 0x100080);

View File

@ -11,6 +11,7 @@ config BAYTRAIL
select TASK_HAVE_PRIORITY_MEDIUM select TASK_HAVE_PRIORITY_MEDIUM
select DMA_AGGREGATED_IRQ select DMA_AGGREGATED_IRQ
select DMA_SUSPEND_DRAIN select DMA_SUSPEND_DRAIN
select DMA_FIFO_PARTITION
help help
Select if your target platform is Baytrail-compatible Select if your target platform is Baytrail-compatible
@ -21,6 +22,7 @@ config CHERRYTRAIL
select TASK_HAVE_PRIORITY_MEDIUM select TASK_HAVE_PRIORITY_MEDIUM
select DMA_AGGREGATED_IRQ select DMA_AGGREGATED_IRQ
select DMA_SUSPEND_DRAIN select DMA_SUSPEND_DRAIN
select DMA_FIFO_PARTITION
help help
Select if your target platform is Cherrytrail-compatible Select if your target platform is Cherrytrail-compatible
@ -49,6 +51,7 @@ config APOLLOLAKE
select TASK_HAVE_PRIORITY_LOW select TASK_HAVE_PRIORITY_LOW
select TASK_HAVE_PRIORITY_MEDIUM select TASK_HAVE_PRIORITY_MEDIUM
select HW_LLI select HW_LLI
select DMA_FIFO_PARTITION
select CAVS select CAVS
select CAVS_VERSION_1_5 select CAVS_VERSION_1_5
help help
@ -64,6 +67,7 @@ config CANNONLAKE
select TASK_HAVE_PRIORITY_MEDIUM select TASK_HAVE_PRIORITY_MEDIUM
select HW_LLI select HW_LLI
select DMA_AGGREGATED_IRQ select DMA_AGGREGATED_IRQ
select DMA_FIFO_PARTITION
select CAVS select CAVS
select CAVS_VERSION_1_8 select CAVS_VERSION_1_8
help help
@ -80,6 +84,7 @@ config SUECREEK
select DW_GPIO select DW_GPIO
select HW_LLI select HW_LLI
select DMA_AGGREGATED_IRQ select DMA_AGGREGATED_IRQ
select DMA_FIFO_PARTITION
select CAVS select CAVS
select CAVS_VERSION_2_0 select CAVS_VERSION_2_0
help help
@ -95,6 +100,7 @@ config ICELAKE
select TASK_HAVE_PRIORITY_MEDIUM select TASK_HAVE_PRIORITY_MEDIUM
select HW_LLI select HW_LLI
select DMA_AGGREGATED_IRQ select DMA_AGGREGATED_IRQ
select DMA_FIFO_PARTITION
select CAVS select CAVS
select CAVS_VERSION_2_0 select CAVS_VERSION_2_0
help help