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arch: xtensa: configs: remove Intel Tiger Lake defconfigs 

Remove the Tiger Lake defconfig and override files for
XTOS builds. These platforms are now supported with Zephyr which
has its own config files.

Signed-off-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
This commit is contained in:
Kai Vehmanen 2023-08-21 18:16:40 +03:00 committed by Kai Vehmanen
parent 1f047fed43
commit 049329be0b
10 changed files with 0 additions and 96 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

5
src/arch/xtensa/configs/override/tigerlake_chrome.config
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@ -1,5 +0,0 @@
CONFIG_CAVS_LPS=y
CONFIG_PROBE=y
CONFIG_COMP_CROSSOVER=y
CONFIG_COMP_DRC=y
CONFIG_COMP_MULTIBAND_DRC=y

7
src/arch/xtensa/configs/override/tigerlake_chrome_dts.config
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@ -1,7 +0,0 @@
CONFIG_CAVS_LPS=y
CONFIG_COMP_IIR=y
CONFIG_COMP_MODULE_ADAPTER=y
CONFIG_DTS_CODEC=y
CONFIG_SAMPLE_KEYPHRASE=n
CONFIG_COMP_SMART_AMP=y
CONFIG_MAXIM_DSM=y

14
src/arch/xtensa/configs/override/tigerlake_chrome_google_aec.config
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@ -1,14 +0,0 @@
CONFIG_SOF_STACK_SIZE=8192
CONFIG_CAVS_LPS=y
CONFIG_SAMPLE_KEYPHRASE=n
CONFIG_COMP_GOOGLE_RTC_AUDIO_PROCESSING=y
CONFIG_COMP_RTNR=y
CONFIG_COMP_SRC=n
CONFIG_COMP_FIR=n
CONFIG_COMP_IIR=n
CONFIG_COMP_MIXER=n
CONFIG_COMP_KPB=n
CONFIG_COMP_SEL=n
CONFIG_COMP_DCBLOCK=n
CONFIG_COMP_ASRC=n
CONFIG_COMP_TFDB=n

15
src/arch/xtensa/configs/override/tigerlake_chrome_igonr.config
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@ -1,15 +0,0 @@
CONFIG_CAVS_LPS=y
CONFIG_PROBE=y
CONFIG_COMP_SRC=n
CONFIG_MATH_FIR=n
CONFIG_MATH_FFT=n
CONFIG_COMP_FIR=n
CONFIG_COMP_IIR=n
CONFIG_COMP_TUNE=n
CONFIG_COMP_MIXER=n
CONFIG_COMP_DCBLOCK=n
CONFIG_COMP_GOOGLE_HOTWORD_DETECT=y
CONFIG_COMP_ASRC=n
CONFIG_COMP_TDFB=n
CONFIG_MAXIM_DSM=y
CONFIG_COMP_IGO_NR=y

3
src/arch/xtensa/configs/override/tigerlake_chrome_rtnr.config
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@ -1,3 +0,0 @@
CONFIG_COMP_RTNR=y
CONFIG_CAVS_LPS=y
CONFIG_PROBE=y

4
src/arch/xtensa/configs/override/tigerlake_chrome_waves.config
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@ -1,4 +0,0 @@
CONFIG_CAVS_LPS=y
CONFIG_COMP_MODULE_ADAPTER=y
CONFIG_WAVES_CODEC=y

16
src/arch/xtensa/configs/override/tigerlake_chrome_waves_google_aec.config
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@ -1,16 +0,0 @@
CONFIG_SOF_STACK_SIZE=8192
CONFIG_CAVS_LPS=y
CONFIG_SAMPLE_KEYPHRASE=n
CONFIG_COMP_GOOGLE_RTC_AUDIO_PROCESSING=y
CONFIG_COMP_RTNR=n
CONFIG_COMP_SRC=n
CONFIG_COMP_FIR=n
CONFIG_COMP_IIR=n
CONFIG_COMP_MIXER=n
CONFIG_COMP_KPB=n
CONFIG_COMP_SEL=n
CONFIG_COMP_DCBLOCK=n
CONFIG_COMP_ASRC=n
CONFIG_COMP_TDFB=n
CONFIG_COMP_MODULE_ADAPTER=y
CONFIG_WAVES_CODEC=y

13
src/arch/xtensa/configs/override/tigerlake_ipc4.config
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@ -1,13 +0,0 @@
CONFIG_IPC_MAJOR_4=y
CONFIG_RIMAGE_SIGNING_SCHEMA="tgl-cavs"
CONFIG_FORMAT_CONVERT_HIFI3=n
CONFIG_PCM_CONVERTER_FORMAT_CONVERT_HIFI3=n
CONFIG_FORMAT_S16LE=y
CONFIG_PCM_CONVERTER_FORMAT_S16LE=y
CONFIG_PCM_CONVERTER_FORMAT_S24LE=y
CONFIG_PCM_CONVERTER_FORMAT_S32LE=y
CONFIG_PCM_CONVERTER_FORMAT_FLOAT=y
CONFIG_PCM_CONVERTER_FORMAT_S16_C16_AND_S16_C32=y
CONFIG_PCM_CONVERTER_FORMAT_S16_C32_AND_S32_C32=y
CONFIG_PCM_CONVERTER_FORMAT_S16_C32_AND_S24_C32=y
CONFIG_PCM_CONVERTER_FORMAT_S16_C32_AND_S16_C32=y

12
src/arch/xtensa/configs/tgph_defconfig
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@ -1,12 +0,0 @@
CONFIG_TIGERLAKE=y
CONFIG_RIMAGE_SIGNING_SCHEMA="tgl-h"
CONFIG_INTEL_DMIC=y
CONFIG_DMIC_HW_IOCLK=38400000
CONFIG_INTEL_SSP=y
CONFIG_INTEL_ALH=y
CONFIG_CORE_COUNT=2
CONFIG_LP_MEMORY_BANKS=1
CONFIG_HP_MEMORY_BANKS=30
CONFIG_L1_DRAM=y
CONFIG_L1_DRAM_MEMORY_BANKS=8
CONFIG_L1_DRAM_MEMORY_BANK_SIZE=8192

7
src/arch/xtensa/configs/tgplp_defconfig
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@ -1,7 +0,0 @@
CONFIG_TIGERLAKE=y
CONFIG_INTEL_DMIC=y
CONFIG_DMIC_HW_IOCLK=38400000
CONFIG_INTEL_SSP=y
CONFIG_INTEL_ALH=y
CONFIG_LP_MEMORY_BANKS=1
CONFIG_HP_MEMORY_BANKS=46