diff --git a/src/arch/xtensa/boot_loader.c b/src/arch/xtensa/boot_loader.c
index 74710697e..925631fa2 100644
--- a/src/arch/xtensa/boot_loader.c
+++ b/src/arch/xtensa/boot_loader.c
@@ -134,12 +134,7 @@ static int32_t hp_sram_init(void)
 	int delay_count = 256;
 	uint32_t status;
 
-#if defined(CONFIG_CANNONLAKE)
 	shim_write(SHIM_LDOCTL, SHIM_LDOCTL_HPSRAM_LDO_ON);
-#else
-	//TODO: clean up sequence same as for CANNONLAKE
-	shim_write(SHIM_LDOCTL, SHIM_HPMEM_POWER_ON);
-#endif
 
 	/* add some delay before touch power register */
 	idelay(delay_count);
@@ -170,12 +165,7 @@ static int32_t hp_sram_init(void)
 	/* add some delay before touch power register */
 	idelay(delay_count);
 
-#if defined(CONFIG_CANNONLAKE)
 	shim_write(SHIM_LDOCTL, SHIM_LDOCTL_HPSRAM_LDO_BYPASS);
-#else
-	//TODO: clean up sequence same as for CANNONLAKE
-	shim_write(SHIM_LDOCTL, SHIM_LPMEM_POWER_BYPASS);
-#endif
 
 	return 0;
 }
diff --git a/src/platform/apollolake/include/platform/asm_ldo_management.h b/src/platform/apollolake/include/platform/asm_ldo_management.h
index 304117332..8d21d0891 100644
--- a/src/platform/apollolake/include/platform/asm_ldo_management.h
+++ b/src/platform/apollolake/include/platform/asm_ldo_management.h
@@ -58,7 +58,7 @@ bnez \ax, 1b
 movi \ax, (SHIM_BASE + SHIM_LDOCTL)
 l32i \ay, \ax, 0
 
-movi \ax, ~(SHIM_LDOCTL_HP_SRAM_MASK)
+movi \ax, ~(SHIM_LDOCTL_HPSRAM_MASK)
 and \ay, \ax, \ay
 or \state, \ay, \state
 
@@ -69,7 +69,7 @@ m_cavs_set_ldo_state \state, \ax
 movi \ax, (SHIM_BASE + SHIM_LDOCTL)
 l32i \ay, \ax, 0
 // LP SRAM mask
-movi \ax, ~(SHIM_LDOCTL_LP_SRAM_MASK)
+movi \ax, ~(SHIM_LDOCTL_LPSRAM_MASK)
 and \ay, \ax, \ay
 or \state, \ay, \state
 
@@ -80,9 +80,9 @@ m_cavs_set_ldo_state \state, \ax
 movi \ay, (SHIM_BASE + SHIM_LDOCTL)
 l32i \az, \ay, 0
 
-movi \ax, ~(SHIM_LDOCTL_HP_SRAM_MASK | SHIM_LDOCTL_LP_SRAM_MASK)
+movi \ax, ~(SHIM_LDOCTL_HPSRAM_MASK | SHIM_LDOCTL_LPSRAM_MASK)
 and \az, \ax, \az
-movi \ax, (SHIM_LDOCTL_HP_SRAM_LDO_ON | SHIM_LDOCTL_LP_SRAM_LDO_ON)
+movi \ax, (SHIM_LDOCTL_HPSRAM_LDO_ON | SHIM_LDOCTL_LPSRAM_LDO_ON)
 or \ax, \az, \ax
 
 m_cavs_set_ldo_state \ax, \ay
@@ -98,10 +98,10 @@ movi \ax, 128
 movi \ay, (SHIM_BASE + SHIM_LDOCTL)
 l32i \az, \ay, 0
 
-movi \ax, ~(SHIM_LDOCTL_HP_SRAM_MASK | SHIM_LDOCTL_LP_SRAM_MASK)
+movi \ax, ~(SHIM_LDOCTL_HPSRAM_MASK | SHIM_LDOCTL_LPSRAM_MASK)
 and \az, \az, \ax
 
-movi \ax, (SHIM_LDOCTL_HP_SRAM_LDO_OFF | SHIM_LDOCTL_LP_SRAM_LDO_OFF)
+movi \ax, (SHIM_LDOCTL_HPSRAM_LDO_OFF | SHIM_LDOCTL_LPSRAM_LDO_OFF)
 or \ax, \ax, \az
 
 s32i \ax, \ay, 0
@@ -118,10 +118,10 @@ movi \ax, 128
 movi \ay, (SHIM_BASE + SHIM_LDOCTL)
 l32i \az, \ay, 0
 
-movi \ax, ~(SHIM_LDOCTL_HP_SRAM_MASK | SHIM_LDOCTL_LP_SRAM_MASK)
+movi \ax, ~(SHIM_LDOCTL_HPSRAM_MASK | SHIM_LDOCTL_LPSRAM_MASK)
 and \az, \az, \ax
 
-movi \ax, (SHIM_LDOCTL_HP_SRAM_LDO_BYPASS | SHIM_LDOCTL_LP_SRAM_LDO_BYPASS)
+movi \ax, (SHIM_LDOCTL_HPSRAM_LDO_BYPASS | SHIM_LDOCTL_LPSRAM_LDO_BYPASS)
 or \ax, \ax, \az
 
 s32i \ax, \ay, 0
diff --git a/src/platform/apollolake/include/platform/shim.h b/src/platform/apollolake/include/platform/shim.h
index b658cc4af..07fe59cd8 100644
--- a/src/platform/apollolake/include/platform/shim.h
+++ b/src/platform/apollolake/include/platform/shim.h
@@ -222,15 +222,14 @@
 
 /** \brief LDO Control */
 #define SHIM_LDOCTL		0xA4
-
-#define SHIM_LDOCTL_HP_SRAM_MASK	(3 << 0)
-#define SHIM_LDOCTL_LP_SRAM_MASK	(3 << 2)
-#define SHIM_LDOCTL_HP_SRAM_LDO_ON	(3 << 0)
-#define SHIM_LDOCTL_LP_SRAM_LDO_ON	(3 << 2)
-#define SHIM_LDOCTL_HP_SRAM_LDO_BYPASS	BIT(0)
-#define SHIM_LDOCTL_LP_SRAM_LDO_BYPASS	BIT(2)
-#define SHIM_LDOCTL_HP_SRAM_LDO_OFF	(0 << 0)
-#define SHIM_LDOCTL_LP_SRAM_LDO_OFF	(0 << 2)
+#define SHIM_LDOCTL_HPSRAM_MASK	(3 << 0)
+#define SHIM_LDOCTL_LPSRAM_MASK	(3 << 2)
+#define SHIM_LDOCTL_HPSRAM_LDO_ON	(3 << 0)
+#define SHIM_LDOCTL_LPSRAM_LDO_ON	(3 << 2)
+#define SHIM_LDOCTL_HPSRAM_LDO_BYPASS	BIT(0)
+#define SHIM_LDOCTL_LPSRAM_LDO_BYPASS	BIT(2)
+#define SHIM_LDOCTL_HPSRAM_LDO_OFF	(0 << 0)
+#define SHIM_LDOCTL_LPSRAM_LDO_OFF	(0 << 2)
 
 #define SHIM_HSPGISTS		0xb0
 #define SHIM_LSPGISTS		0xb4
diff --git a/src/platform/apollolake/power_down.S b/src/platform/apollolake/power_down.S
index 1074e602b..96b1d1b22 100644
--- a/src/platform/apollolake/power_down.S
+++ b/src/platform/apollolake/power_down.S
@@ -88,12 +88,12 @@ power_down:
     beqz b_enable_lpsram, _PD_DISABLE_HPSRAM
 
 _PD_DISABLE_LPSRAM:
-    movi temp_reg0, SHIM_LDOCTL_LP_SRAM_LDO_ON
+    movi temp_reg0, SHIM_LDOCTL_LPSRAM_LDO_ON
     m_cavs_set_lpldo_state temp_reg0, temp_reg1, temp_reg2
 
 		m_cavs_lpsram_power_off temp_reg0, temp_reg1, temp_reg2
 
-    movi temp_reg0, SHIM_LDOCTL_LP_SRAM_LDO_OFF
+    movi temp_reg0, SHIM_LDOCTL_LPSRAM_LDO_OFF
     m_cavs_set_lpldo_state temp_reg0, temp_reg1, temp_reg2
 
     // DISABLE_HPSRAM is aligned so there can be zeros between
@@ -109,13 +109,13 @@ _PD_DISABLE_HPSRAM:
     l32i temp_reg0, pu32_hpsram_mask, 0
     beqz temp_reg0, _PD_SLEEP
 
-    movi temp_reg0, SHIM_LDOCTL_HP_SRAM_LDO_ON
+    movi temp_reg0, SHIM_LDOCTL_HPSRAM_LDO_ON
     m_cavs_set_hpldo_state temp_reg0, temp_reg1, temp_reg2
     // Disable L2 cache in case it would be enabled
 
     m_cavs_hpsram_power_off temp_reg0, temp_reg1, temp_reg2
 
-    movi temp_reg0, SHIM_LDOCTL_HP_SRAM_LDO_OFF
+    movi temp_reg0, SHIM_LDOCTL_HPSRAM_LDO_OFF
     m_cavs_set_hpldo_state temp_reg0, temp_reg1, temp_reg2
 
 	// 	For BXT-P we need to deassert VNN request and select slow XTAL
diff --git a/src/platform/cannonlake/include/platform/shim.h b/src/platform/cannonlake/include/platform/shim.h
index b8075db31..8ef476d70 100644
--- a/src/platform/cannonlake/include/platform/shim.h
+++ b/src/platform/cannonlake/include/platform/shim.h
@@ -205,6 +205,7 @@
 
 #define SHIM_L2_MECS		(SHIM_BASE + 0xd0)
 
+/** \brief LDO Control */
 #define SHIM_LDOCTL		0xA4
 #define SHIM_LDOCTL_HPSRAM_MASK	(3 << 0)
 #define SHIM_LDOCTL_LPSRAM_MASK	(3 << 2)
@@ -215,7 +216,6 @@
 #define SHIM_LDOCTL_HPSRAM_LDO_OFF	(0 << 0)
 #define SHIM_LDOCTL_LPSRAM_LDO_OFF	(0 << 2)
 
-
 #define DSP_INIT_LPGPDMA(x)	(0x71A60 + (2*x))
 #define LPGPDMA_CTLOSEL_FLAG	(1 << 15)
 #define LPGPDMA_CHOSEL_FLAG	(0xFF)
diff --git a/src/platform/icelake/include/platform/shim.h b/src/platform/icelake/include/platform/shim.h
index 6cb819567..d49d79786 100644
--- a/src/platform/icelake/include/platform/shim.h
+++ b/src/platform/icelake/include/platform/shim.h
@@ -202,9 +202,16 @@
 
 #define SHIM_L2_MECS		(SHIM_BASE + 0xd0)
 
+/** \brief LDO Control */
 #define SHIM_LDOCTL		0xA4
-#define SHIM_HPMEM_POWER_ON	(0x3 << 0)
-#define SHIM_LPMEM_POWER_BYPASS	(0x1 << 0)
+#define SHIM_LDOCTL_HPSRAM_MASK	(3 << 0)
+#define SHIM_LDOCTL_LPSRAM_MASK	(3 << 2)
+#define SHIM_LDOCTL_HPSRAM_LDO_ON	(3 << 0)
+#define SHIM_LDOCTL_LPSRAM_LDO_ON	(3 << 2)
+#define SHIM_LDOCTL_HPSRAM_LDO_BYPASS	BIT(0)
+#define SHIM_LDOCTL_LPSRAM_LDO_BYPASS	BIT(2)
+#define SHIM_LDOCTL_HPSRAM_LDO_OFF	(0 << 0)
+#define SHIM_LDOCTL_LPSRAM_LDO_OFF	(0 << 2)
 
 #define DSP_INIT_LPGPDMA(x)	(0x71A60 + (2*x))
 #define LPGPDMA_CTLOSEL_FLAG	(1 << 15)
diff --git a/src/platform/suecreek/include/platform/shim.h b/src/platform/suecreek/include/platform/shim.h
index 63fa6c3b6..143fd6cee 100644
--- a/src/platform/suecreek/include/platform/shim.h
+++ b/src/platform/suecreek/include/platform/shim.h
@@ -202,9 +202,16 @@
 
 #define SHIM_L2_MECS		(SHIM_BASE + 0xd0)
 
+/** \brief LDO Control */
 #define SHIM_LDOCTL		0xA4
-#define SHIM_HPMEM_POWER_ON	(0x3 << 0)
-#define SHIM_LPMEM_POWER_BYPASS	(0x1 << 0)
+#define SHIM_LDOCTL_HPSRAM_MASK	(3 << 0)
+#define SHIM_LDOCTL_LPSRAM_MASK	(3 << 2)
+#define SHIM_LDOCTL_HPSRAM_LDO_ON	(3 << 0)
+#define SHIM_LDOCTL_LPSRAM_LDO_ON	(3 << 2)
+#define SHIM_LDOCTL_HPSRAM_LDO_BYPASS	BIT(0)
+#define SHIM_LDOCTL_LPSRAM_LDO_BYPASS	BIT(2)
+#define SHIM_LDOCTL_HPSRAM_LDO_OFF	(0 << 0)
+#define SHIM_LDOCTL_LPSRAM_LDO_OFF	(0 << 2)
 
 #define DSP_INIT_LPGPDMA(x)	(0x71A60 + (2*x))
 #define LPGPDMA_CTLOSEL_FLAG	(1 << 15)