mirror of https://github.com/thesofproject/sof.git
ace: dma: Add temporary dma ops to allow get attributes
The attributes of the dma controllers must be moved to the zephyr. Until then, we will use a own copy of the get_attribute function from the alh and dw_dma drivers. Thanks to this, we can completely disable it building in the configuration. Signed-off-by: Adrian Warecki <adrian.warecki@intel.com>
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ac33ac128b
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02152c3dcf
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@ -17,6 +17,71 @@
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#include <rtos/spinlock.h>
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#include <rtos/spinlock.h>
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#include <zephyr/device.h>
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#include <zephyr/device.h>
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#define DW_DMA_BUFFER_ALIGNMENT 0x4
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#define DW_DMA_COPY_ALIGNMENT 0x4
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#define DW_DMA_BUFFER_PERIOD_COUNT 0x4
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static int dw_dma_get_attribute(struct dma *dma, uint32_t type,
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uint32_t *value)
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{
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int ret = 0;
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switch (type) {
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case DMA_ATTR_BUFFER_ALIGNMENT:
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*value = DW_DMA_BUFFER_ALIGNMENT;
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break;
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case DMA_ATTR_COPY_ALIGNMENT:
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*value = DW_DMA_COPY_ALIGNMENT;
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break;
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case DMA_ATTR_BUFFER_ADDRESS_ALIGNMENT:
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*value = PLATFORM_DCACHE_ALIGN;
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break;
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case DMA_ATTR_BUFFER_PERIOD_COUNT:
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*value = DW_DMA_BUFFER_PERIOD_COUNT;
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break;
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default:
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ret = -EINVAL;
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break;
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}
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return ret;
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}
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const struct dma_ops dw_dma_ops = {
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.get_attribute = dw_dma_get_attribute,
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};
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#define HDA_DMA_BUFFER_ALIGNMENT 0x20
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#define HDA_DMA_COPY_ALIGNMENT 0x20
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#define HDA_DMA_BUFFER_ADDRESS_ALIGNMENT 0x80
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#define HDA_DMA_BUFFER_PERIOD_COUNT 2
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static int hda_dma_get_attribute(struct dma *dma, uint32_t type, uint32_t *value)
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{
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switch (type) {
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case DMA_ATTR_BUFFER_ALIGNMENT:
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*value = HDA_DMA_BUFFER_ALIGNMENT;
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break;
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case DMA_ATTR_COPY_ALIGNMENT:
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*value = HDA_DMA_COPY_ALIGNMENT;
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break;
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case DMA_ATTR_BUFFER_ADDRESS_ALIGNMENT:
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*value = HDA_DMA_BUFFER_ADDRESS_ALIGNMENT;
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break;
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case DMA_ATTR_BUFFER_PERIOD_COUNT:
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*value = HDA_DMA_BUFFER_PERIOD_COUNT;
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break;
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default:
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return -EINVAL;
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}
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return 0;
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}
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const struct dma_ops hda_dma_ops = {
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.get_attribute = hda_dma_get_attribute,
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};
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SHARED_DATA struct dma dma[] = {
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SHARED_DATA struct dma dma[] = {
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#if DT_NODE_HAS_STATUS(DT_NODELABEL(lpgpdma0), okay)
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#if DT_NODE_HAS_STATUS(DT_NODELABEL(lpgpdma0), okay)
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{ /* Low Power GP DMAC 0 */
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{ /* Low Power GP DMAC 0 */
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@ -28,6 +93,7 @@ SHARED_DATA struct dma dma[] = {
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DMA_DEV_ALH,
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DMA_DEV_ALH,
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.channels = 8,
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.channels = 8,
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},
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},
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.ops = &dw_dma_ops,
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.z_dev = DEVICE_DT_GET(DT_NODELABEL(lpgpdma0)),
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.z_dev = DEVICE_DT_GET(DT_NODELABEL(lpgpdma0)),
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},
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},
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#endif
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#endif
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@ -41,6 +107,7 @@ SHARED_DATA struct dma dma[] = {
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DMA_DEV_ALH,
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DMA_DEV_ALH,
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.channels = 8,
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.channels = 8,
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},
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},
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.ops = &dw_dma_ops,
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.z_dev = DEVICE_DT_GET(DT_NODELABEL(lpgpdma1)),
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.z_dev = DEVICE_DT_GET(DT_NODELABEL(lpgpdma1)),
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},
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},
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#endif
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#endif
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@ -52,6 +119,7 @@ SHARED_DATA struct dma dma[] = {
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.devs = DMA_DEV_HOST,
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.devs = DMA_DEV_HOST,
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.channels = DT_PROP(DT_NODELABEL(hda_host_in), dma_channels),
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.channels = DT_PROP(DT_NODELABEL(hda_host_in), dma_channels),
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},
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},
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.ops = &hda_dma_ops,
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.z_dev = DEVICE_DT_GET(DT_NODELABEL(hda_host_in)),
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.z_dev = DEVICE_DT_GET(DT_NODELABEL(hda_host_in)),
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},
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},
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#endif
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#endif
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@ -63,6 +131,7 @@ SHARED_DATA struct dma dma[] = {
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.devs = DMA_DEV_HOST,
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.devs = DMA_DEV_HOST,
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.channels = DT_PROP(DT_NODELABEL(hda_host_out), dma_channels),
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.channels = DT_PROP(DT_NODELABEL(hda_host_out), dma_channels),
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},
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},
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.ops = &hda_dma_ops,
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.z_dev = DEVICE_DT_GET(DT_NODELABEL(hda_host_out)),
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.z_dev = DEVICE_DT_GET(DT_NODELABEL(hda_host_out)),
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},
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},
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#endif
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#endif
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@ -74,6 +143,7 @@ SHARED_DATA struct dma dma[] = {
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.devs = DMA_DEV_HDA,
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.devs = DMA_DEV_HDA,
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.channels = DT_PROP(DT_NODELABEL(hda_link_in), dma_channels),
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.channels = DT_PROP(DT_NODELABEL(hda_link_in), dma_channels),
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},
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},
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.ops = &hda_dma_ops,
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.z_dev = DEVICE_DT_GET(DT_NODELABEL(hda_link_in)),
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.z_dev = DEVICE_DT_GET(DT_NODELABEL(hda_link_in)),
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},
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},
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#endif
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#endif
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@ -85,6 +155,7 @@ SHARED_DATA struct dma dma[] = {
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.devs = DMA_DEV_HDA,
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.devs = DMA_DEV_HDA,
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.channels = DT_PROP(DT_NODELABEL(hda_link_out), dma_channels),
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.channels = DT_PROP(DT_NODELABEL(hda_link_out), dma_channels),
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},
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},
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.ops = &hda_dma_ops,
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.z_dev = DEVICE_DT_GET(DT_NODELABEL(hda_link_out)),
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.z_dev = DEVICE_DT_GET(DT_NODELABEL(hda_link_out)),
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},
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},
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#endif
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#endif
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