2019-06-02 03:37:26 +08:00
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# SPDX-License-Identifier: BSD-3-Clause
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2018-12-28 04:18:49 +08:00
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mainmenu "SOF $(PROJECTVERSION) Configuration"
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comment "Compiler: $(CC_VERSION_TEXT)"
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2019-04-05 19:49:18 +08:00
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menu "CAVS"
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config HP_MEMORY_BANKS
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int "HP memory banks count"
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depends on CAVS
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default 8
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help
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Available memory banks count for High Performance memory
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Lowering available banks could result in lower power consumption
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Too low count should result in unresponsive/crashing image due to not
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enough space for FW base image
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Banks are 64kb in size.
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config LP_MEMORY_BANKS
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int "LP memory banks count"
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default 1
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depends on CAVS
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help
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Available memory banks count for Low Power memory
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endmenu
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2018-12-28 04:18:49 +08:00
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config HOST_PTABLE
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bool
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default n
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config TASK_HAVE_PRIORITY_MEDIUM
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bool
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default n
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2019-02-11 18:50:19 +08:00
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config TASK_HAVE_PRIORITY_LOW
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bool
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default n
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2018-12-28 04:18:49 +08:00
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config BOOT_LOADER
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bool
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default n
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2019-05-27 21:01:36 +08:00
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config HAVE_RESET_VECTOR_ROM
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bool
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default n
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help
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Select if your platform has the reset vector
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in ROM.
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2018-12-28 04:18:49 +08:00
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config IRQ_MAP
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bool
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default n
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config DMA_GW
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bool
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default n
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config MEM_WND
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bool
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default n
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2019-03-04 20:04:35 +08:00
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config DW_SPI
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bool
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default n
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config INTEL_IOMUX
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bool
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default n
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config DW_GPIO
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bool
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default n
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2019-04-10 23:48:34 +08:00
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config HW_LLI
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bool
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default n
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help
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Hardware linked list is the DW-DMA feature, which allows
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to automatically reload the next programmed linked list
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item from memory without stopping the transfer. Without
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it the transfer stops after every lli read and FW needs
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to manually setup the next transfer.
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Any platforms with hardware linked list support
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should set this.
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2019-04-12 22:37:14 +08:00
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config DMA_AGGREGATED_IRQ
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bool
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default n
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help
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Some platforms cannot register interrupt per DMA channel
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and have the possibility only to register interrupts per
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DMA controller, which require manual handling of aggregated
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irq.
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Any platforms with DMA aggregated interrupts support
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should set this.
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2019-04-16 21:53:53 +08:00
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config DMA_SUSPEND_DRAIN
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bool
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default n
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help
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Some platforms cannot just simple disable DMA
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channel during the transfer, because it will
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hang the whole DMA controller. Instead we can
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suspend the channel and drain the FIFO in order
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to stop the channel as soon as possible.
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Any platforms without the ability to disable
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the DMA channel right away should set this.
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2019-04-16 21:59:02 +08:00
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config DMA_FIFO_PARTITION
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bool
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default n
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help
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Some platforms require to manually set DMA
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FIFO partitions before starting any transfer.
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Any platforms without automatic FIFO partitions
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should set this.
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2018-12-28 04:18:49 +08:00
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source "src/Kconfig"
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menu "Debug"
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2019-05-24 18:13:41 +08:00
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config DEBUG
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bool "Enable debug build"
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default n
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help
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Select for debug build
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2018-12-28 04:18:49 +08:00
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config GDB_DEBUG
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bool "GDB Stub"
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default n
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help
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Select for GDB debugging
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config DEBUG_HEAP
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bool "Heap debug"
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default n
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help
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Select for enable heap alloc debugging
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2019-05-24 19:30:45 +08:00
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config DEBUG_BLOCK_FREE
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bool "Blocks freeing debug"
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default n
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help
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It enables checking if free was called multiple times on
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already freed block of memory. Enabling this feature increases
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number of memory writes and reads, due to checks for memory patterns
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that may be performed on allocation and deallocation.
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2019-01-18 18:20:25 +08:00
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config BUILD_VM_ROM
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bool "Build VM ROM"
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default n
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help
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Select if you want to build VM ROM
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2019-05-15 21:32:17 +08:00
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config DEBUG_IPC_COUNTERS
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bool "IPC counters"
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depends on CAVS
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depends on DEBUG
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default n
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help
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Select for enabling tracing IPC counter in SRAM_REG mailbox
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2018-12-28 04:18:49 +08:00
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endmenu
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