2018-06-01 10:29:05 +08:00
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/*
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* Copyright (c) 2018, Intel Corporation
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* * Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* * Neither the name of the Intel Corporation nor the
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* names of its contributors may be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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* Author: Seppo Ingalsuo <seppo.ingalsuo@linux.intel.com>
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* Liam Girdwood <liam.r.girdwood@linux.intel.com>
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* Keyon Jie <yang.jie@linux.intel.com>
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* Ranjani Sridharan <ranjani.sridharan@linux.intel.com>
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*/
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#include <stdint.h>
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#include "host/common_test.h"
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#include "host/trace.h"
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/* enable trace by default in testbench */
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2018-11-07 23:36:56 +08:00
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int test_bench_trace = 1;
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2018-06-01 10:29:05 +08:00
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2018-11-07 23:36:56 +08:00
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#define CASE(x) case TRACE_CLASS_##x: return #x
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2018-06-01 10:29:05 +08:00
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/* look up subsystem class name from table */
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2018-11-07 23:36:56 +08:00
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char *get_trace_class(uint32_t trace_class)
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2018-06-01 10:29:05 +08:00
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{
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2018-11-07 23:36:56 +08:00
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switch (trace_class) {
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CASE(IRQ);
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CASE(IPC);
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CASE(PIPE);
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CASE(HOST);
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CASE(DAI);
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CASE(DMA);
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CASE(SSP);
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CASE(COMP);
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CASE(WAIT);
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CASE(LOCK);
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CASE(MEM);
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CASE(MIXER);
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CASE(BUFFER);
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CASE(VOLUME);
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CASE(SWITCH);
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CASE(MUX);
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CASE(SRC);
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CASE(TONE);
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CASE(EQ_FIR);
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CASE(EQ_IIR);
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CASE(SA);
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CASE(DMIC);
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CASE(POWER);
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default: return "unknown";
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2018-06-01 10:29:05 +08:00
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}
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2018-09-25 18:04:41 +08:00
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}
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2018-06-01 10:29:05 +08:00
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/* enable trace in testbench */
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void tb_enable_trace(bool enable)
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{
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test_bench_trace = enable;
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if (enable)
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debug_print("trace print enabled\n");
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else
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debug_print("trace print disabled\n");
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}
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