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sof/tools/topology/development/sof-apl-pcm512x-nohdmi.m4

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topology: up2 without HDMI the kernel supports easy removal of HDMI support, let's add the matching topology. Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
2019-02-06 06:50:29 +08:00
#
# Topology for generic Apollolake UP^2 with pcm512x codec and no HDMI.
#
# Include topology builder
include(`utils.m4')
include(`dai.m4')
include(`pipeline.m4')
include(`ssp.m4')
# Include TLV library
include(`common/tlv.m4')
# Include Token library
include(`sof/tokens.m4')
# Include Apollolake DSP configuration
include(`platform/intel/bxt.m4')
DEBUG_START
#
# Define the pipelines
#
topology: enable eq pipeline when EQ is enabled in makefile Instead of making new files for audio equalizer topology, reuse existing topology and replace only volume pipeline by macro replacement. Signed-off-by: Fred Oh <fred.oh@linux.intel.com>
2020-03-17 00:35:38 +08:00
# PPROC is for playback pipeline processing, i.e volume, eq-volume, eq-iir, eq-fir etc
# In this file, volume and eq-volume are used. If anything else is used, please update
# pipeline comments below for tracking purpose.
topology: up2 without HDMI the kernel supports easy removal of HDMI support, let's add the matching topology. Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
2019-02-06 06:50:29 +08:00
#
topology: enable eq pipeline when EQ is enabled in makefile Instead of making new files for audio equalizer topology, reuse existing topology and replace only volume pipeline by macro replacement. Signed-off-by: Fred Oh <fred.oh@linux.intel.com>
2020-03-17 00:35:38 +08:00
ifelse(PPROC, `volume', `# PCM0 ----> volume -----> SSP5 (pcm512x)',
`ifelse(PPROC, `eq-volume',
`# PCM0 ----> EQ IIR ----> EQ FIR ----> volume ----> SSP5 (pcm512x)', `')')
#
# The pipeline naming notation is pipe-PROCESSING-DIRECTION.m4
define(PIPE_PROC_PLAYBACK, `sof/pipe-`PPROC'-playback.m4')
topology: up2 without HDMI the kernel supports easy removal of HDMI support, let's add the matching topology. Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
2019-02-06 06:50:29 +08:00
topology: revert all cAVS pipelines to 2 periods Reverts all previosly changed cAVS pipelines from 3 to 2 periods. Now we have separate buffers for DMA, so there is no need to make DAI buffers consist of 3 periods. DMA will take care of any internal hardware requirements. Signed-off-by: Tomasz Lauda <tomasz.lauda@linux.intel.com>
2019-10-22 15:09:58 +08:00
dnl PIPELINE_PCM_ADD(pipeline,
topology: up2 without HDMI the kernel supports easy removal of HDMI support, let's add the matching topology. Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
2019-02-06 06:50:29 +08:00
dnl pipe id, pcm, max channels, format,
topology: enable pcm range and pipeline rate and remove frame count Enable setting pcm min and max rate from top level m4 pipeline macro. This way it is possible to configure the whole pipeline to correct samplerate range in 1 file. Previously you needed to modify the pipeline macros where the rate was hardcoded. As the frame count is calculated from pcm/dai rate and scheduling time the frame count is obsolete. Introduce pipeline rate parameter to help configuring components with fixed output rate. We can't deduce this from pcm range since for example src might accept bigger max rate than the following dai. Even though the parameter is named "pipeline rate" it essentially means the "final" output rate to which this pipeline is connected to (dai or other pipeline). In capture pipelines it means the originating fixed dai rate. Signed-off-by: Jaska Uimonen <jaska.uimonen@intel.com>
2019-01-03 20:11:21 +08:00
dnl period, priority, core,
topology: revert all cAVS pipelines to 2 periods Reverts all previosly changed cAVS pipelines from 3 to 2 periods. Now we have separate buffers for DMA, so there is no need to make DAI buffers consist of 3 periods. DMA will take care of any internal hardware requirements. Signed-off-by: Tomasz Lauda <tomasz.lauda@linux.intel.com>
2019-10-22 15:09:58 +08:00
dnl pcm_min_rate, pcm_max_rate, pipeline_rate,
dnl time_domain, sched_comp)
topology: up2 without HDMI the kernel supports easy removal of HDMI support, let's add the matching topology. Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
2019-02-06 06:50:29 +08:00
# Low Latency playback pipeline 1 on PCM 0 using max 2 channels of s32le.
topology: enable pcm range and pipeline rate and remove frame count Enable setting pcm min and max rate from top level m4 pipeline macro. This way it is possible to configure the whole pipeline to correct samplerate range in 1 file. Previously you needed to modify the pipeline macros where the rate was hardcoded. As the frame count is calculated from pcm/dai rate and scheduling time the frame count is obsolete. Introduce pipeline rate parameter to help configuring components with fixed output rate. We can't deduce this from pcm range since for example src might accept bigger max rate than the following dai. Even though the parameter is named "pipeline rate" it essentially means the "final" output rate to which this pipeline is connected to (dai or other pipeline). In capture pipelines it means the originating fixed dai rate. Signed-off-by: Jaska Uimonen <jaska.uimonen@intel.com>
2019-01-03 20:11:21 +08:00
# Set 1000us deadline on core 0 with priority 0
topology: enable eq pipeline when EQ is enabled in makefile Instead of making new files for audio equalizer topology, reuse existing topology and replace only volume pipeline by macro replacement. Signed-off-by: Fred Oh <fred.oh@linux.intel.com>
2020-03-17 00:35:38 +08:00
PIPELINE_PCM_ADD(PIPE_PROC_PLAYBACK,
topology: up2 without HDMI the kernel supports easy removal of HDMI support, let's add the matching topology. Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
2019-02-06 06:50:29 +08:00
1, 0, 2, s32le,
topology: revert all cAVS pipelines to 2 periods Reverts all previosly changed cAVS pipelines from 3 to 2 periods. Now we have separate buffers for DMA, so there is no need to make DAI buffers consist of 3 periods. DMA will take care of any internal hardware requirements. Signed-off-by: Tomasz Lauda <tomasz.lauda@linux.intel.com>
2019-10-22 15:09:58 +08:00
1000, 0, 0,
topology: enable pcm range and pipeline rate and remove frame count Enable setting pcm min and max rate from top level m4 pipeline macro. This way it is possible to configure the whole pipeline to correct samplerate range in 1 file. Previously you needed to modify the pipeline macros where the rate was hardcoded. As the frame count is calculated from pcm/dai rate and scheduling time the frame count is obsolete. Introduce pipeline rate parameter to help configuring components with fixed output rate. We can't deduce this from pcm range since for example src might accept bigger max rate than the following dai. Even though the parameter is named "pipeline rate" it essentially means the "final" output rate to which this pipeline is connected to (dai or other pipeline). In capture pipelines it means the originating fixed dai rate. Signed-off-by: Jaska Uimonen <jaska.uimonen@intel.com>
2019-01-03 20:11:21 +08:00
48000, 48000, 48000)
topology: up2 without HDMI the kernel supports easy removal of HDMI support, let's add the matching topology. Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
2019-02-06 06:50:29 +08:00
#
# DAIs configuration
#
dnl DAI_ADD(pipeline,
dnl pipe id, dai type, dai_index, dai_be,
dnl buffer, periods, format,
topology: apl: glk: use 3 periods for SSP and DMIC DAIs Changes number of SSP and DMIC DAI periods from 2 to 3. This way we can support both timer and new single DMA channel scheduling. Signed-off-by: Tomasz Lauda <tomasz.lauda@linux.intel.com>
2019-09-19 22:19:49 +08:00
dnl deadline, priority, core, time_domain)
topology: up2 without HDMI the kernel supports easy removal of HDMI support, let's add the matching topology. Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
2019-02-06 06:50:29 +08:00
topology: revert all cAVS pipelines to 2 periods Reverts all previosly changed cAVS pipelines from 3 to 2 periods. Now we have separate buffers for DMA, so there is no need to make DAI buffers consist of 3 periods. DMA will take care of any internal hardware requirements. Signed-off-by: Tomasz Lauda <tomasz.lauda@linux.intel.com>
2019-10-22 15:09:58 +08:00
# playback DAI is SSP5 using 2 periods
topology: enable pcm range and pipeline rate and remove frame count Enable setting pcm min and max rate from top level m4 pipeline macro. This way it is possible to configure the whole pipeline to correct samplerate range in 1 file. Previously you needed to modify the pipeline macros where the rate was hardcoded. As the frame count is calculated from pcm/dai rate and scheduling time the frame count is obsolete. Introduce pipeline rate parameter to help configuring components with fixed output rate. We can't deduce this from pcm range since for example src might accept bigger max rate than the following dai. Even though the parameter is named "pipeline rate" it essentially means the "final" output rate to which this pipeline is connected to (dai or other pipeline). In capture pipelines it means the originating fixed dai rate. Signed-off-by: Jaska Uimonen <jaska.uimonen@intel.com>
2019-01-03 20:11:21 +08:00
# Buffers use s24le format, 1000us deadline on core 0 with priority 0
topology: up2 without HDMI the kernel supports easy removal of HDMI support, let's add the matching topology. Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
2019-02-06 06:50:29 +08:00
DAI_ADD(sof/pipe-dai-playback.m4,
1, SSP, 5, SSP5-Codec,
topology: revert all cAVS pipelines to 2 periods Reverts all previosly changed cAVS pipelines from 3 to 2 periods. Now we have separate buffers for DMA, so there is no need to make DAI buffers consist of 3 periods. DMA will take care of any internal hardware requirements. Signed-off-by: Tomasz Lauda <tomasz.lauda@linux.intel.com>
2019-10-22 15:09:58 +08:00
PIPELINE_SOURCE_1, 2, s24le,
topology: cavs: switch all pipelines to timer scheduling Switches all pipelines for cAVS platforms to timer scheduling. This way we limit the number of interrupt levels processed in the system. Timer, IPC and IDC are already on level 2 and DMAs are on level 5. Signed-off-by: Tomasz Lauda <tomasz.lauda@linux.intel.com>
2019-10-15 19:40:26 +08:00
1000, 0, 0, SCHEDULE_TIME_DOMAIN_TIMER)
topology: up2 without HDMI the kernel supports easy removal of HDMI support, let's add the matching topology. Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
2019-02-06 06:50:29 +08:00
# PCM Low Latency, id 0
dnl PCM_PLAYBACK_ADD(name, pcm_id, playback)
PCM_PLAYBACK_ADD(Port5, 0, PIPELINE_PCM_1)
#
# BE configurations - overrides config in ACPI if present
#
#SSP 5 (ID: 0)
DAI_CONFIG(SSP, 5, 0, SSP5-Codec,
SSP_CONFIG(I2S, SSP_CLOCK(mclk, 24576000, codec_mclk_in),
SSP_CLOCK(bclk, 3072000, codec_slave),
SSP_CLOCK(fsync, 48000, codec_slave),
SSP_TDM(2, 32, 3, 3),
SSP_CONFIG_DATA(SSP, 5, 24)))
DEBUG_END