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sof/app/overlays/mtl/fpga_overlay.conf

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platform: mtl: Add meteorlake plaftom Added base files of meteorlake plaftom: Board configuration CPU, clock and memory configuration Platform bootstrap code IPC driver wrapper for Zephyr IPC API for ACE1.5 platforms. Signed-off-by: Andrey Borisovich <andrey.borisovich@intel.com> Signed-off-by: Marcin Szkudlinski <marcin.szkudlinski@intel.com> Signed-off-by: Adrian Warecki <adrian.warecki@intel.com> Signed-off-by: Konrad Leszczynski <konrad.leszczynski@intel.com> Signed-off-by: Anas Nashif <anas.nashif@intel.com> Signed-off-by: Tomasz Leman <tomasz.m.leman@intel.com> Signed-off-by: Rafal Redzimski <rafal.f.redzimski@intel.com> Signed-off-by: Adrian Bonislawski <adrian.bonislawski@intel.com> Signed-off-by: Serhiy Katsyuba <serhiy.katsyuba@intel.com>
2022-09-06 21:13:39 +08:00
CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=19200000
mtl: board: Update mtl board configuration Necessary configuration options of the mtl board have been enabled. Signed-off-by: Andrey Borisovich <andrey.borisovich@intel.com> Signed-off-by: Marcin Szkudlinski <marcin.szkudlinski@intel.com> Signed-off-by: Adrian Warecki <adrian.warecki@intel.com> Signed-off-by: Konrad Leszczynski <konrad.leszczynski@intel.com> Signed-off-by: Anas Nashif <anas.nashif@intel.com> Signed-off-by: Tomasz Leman <tomasz.m.leman@intel.com> Signed-off-by: Rafal Redzimski <rafal.f.redzimski@intel.com> Signed-off-by: Adrian Bonislawski <adrian.bonislawski@intel.com> Signed-off-by: Serhiy Katsyuba <serhiy.katsyuba@intel.com>
2022-09-30 21:57:04 +08:00
CONFIG_DAI_DMIC_HW_IOCLK=19200000