mirror of https://github.com/thesofproject/sof.git
155 lines
5.7 KiB
Markdown
155 lines
5.7 KiB
Markdown
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# SOF testbench
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### Features
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* Simulate IPC3 and IPC4 SOF versions with run of set of processing
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components based on desired topology.
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* Replaces host and dai components with file I/O with raw binary
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S16_LE/S24_LE/S32_LE or text format files for audio waveforms.
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* Much faster than real-time execution in native build, e.g. x86 on
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Linux for efficient validation usage.
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* With xtensa DSP build offers cycles accurate simulated environment
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execution. And also with options for simulation speed vs. model
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accuracy.
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* Allows easy use of conventional debugger, profiler, leak and memory check
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tools usage for DSP firmware code.
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### Quick how-to
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The simplest way to build and execute testbench is with supplied
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scripts. It executes a simple chirp waveform test for a number of
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processing components. Corrupted audio or failure in execution
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results to fail of test.
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The commands "build-tools.sh -t" and "host-testbench.sh" are currently
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valid only for default IPC3 build of testbench.
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```
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cd $SOF_WORKSPACE/sof
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scripts/build-tools.sh -t
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scripts/rebuild-testbench.sh
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scripts/host-testbench.sh
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```
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### Manual run of IPC3 testbench
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As an example, process a wav file and listen it. The example
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processing component is DC block. The wav file is first converted with
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sox to raw 32 bit 48 kHz stereo format, then processed by testbench,
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converted back to wav.
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```
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cd $SOF_WORKSPACE/sof
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sox --encoding signed-integer /usr/share/sounds/alsa/Front_Left.wav -L -r 48000 -c 2 -b 32 in.raw
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tools/testbench/build_testbench/install/bin/testbench -r 48000 -R 48000 -c 2 -n 2 -b S32_LE \
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-t tools/build_tools/test/topology/test-playback-ssp5-mclk-0-I2S-dcblock-s32le-s32le-48k-24576k-codec.tplg \
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-i in.raw -o out.raw
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sox --encoding signed-integer -L -r 48000 -c 2 -b 32 in.raw out.wav
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aplay out.wav
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```
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The testbench binary can be debugged and profiled with native
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executable tools like gdb, ddd (GUI for gdb), gprof, and valgrind.
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### Profiling of testbench run on xtensa
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Fist, the testbench is build in this example for Intel MTL
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platform. This needs access to Cadence Xplorer toolchain with the core
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confiration for the platform.
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```
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cd $SOF_WORKSPACE/sof
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export XTENSA_TOOLS_ROOT=~/xtensa/XtDevTools
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export ZEPHYR_TOOLCHAIN_VARIANT=xt-clang
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scripts/rebuild-testbench.sh -p mtl
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source tools/testbench/build_xt_testbench/xtrun_env.sh
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```
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Next the testbench is run with xt-run simulator. The example component
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is dynamic range processing (DRC). For proling data generate use
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option --profile. Note that this is a lot slower than native run. An
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1s extract of a pink noise file is used as example.
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```
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sox --encoding signed-integer /usr/share/sounds/alsa/Noise.wav -L -r 48000 -c 2 -b 32 in.raw trim 0.0 1.0
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$XTENSA_PATH/xt-run --profile=profile.out tools/testbench/build_xt_testbench/testbench \
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-q -r 48000 -R 48000 -c 2 -n 2 -b S32_LE \
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-t tools/build_tools/test/topology/test-playback-ssp5-mclk-0-I2S-drc-s32le-s32le-48k-24576k-codec.tplg \
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-i in.raw -o out.raw 2> trace.txt
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```
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Then convert the profiler data to readable format and check it.
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Note: Current version of testbench does not have functional quiet mode
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"-q" switch to suppress trace. Due all debug traces print
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out. Majority of performance is spent in printing.
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```
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$XTENSA_PATH/xt-gprof tools/testbench/build_xt_testbench/testbench profile.out > example_profile.txt
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less example_profile.txt
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```
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### Perform audio processing quality checks
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This step needs Matlab or Octave tool with signal processing
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package. A number of tests is performed for IIR equalizer component as
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example. The script opens plot windows and outputs a text report in
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the end. A simple pass/fail criteria is used to report a verdict of
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the test run.
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```
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cd $SOF_WORKSPACE/sof/tools/test/audio
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octave -q --eval "pkg load signal io; [n_fail]=process_test('eq-iir', 32, 32, 48000, 1, 1); input('Press ENTER'); exit(n_fail)"
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```
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See from interactive Octave shell command "help process_test" the
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explanation for the test run parameters.
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### Manual run of IPC4 testbench
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Apply this patch to SOF and rebuild it.
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```
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diff --git a/src/arch/host/configs/library_defconfig b/src/arch/host/configs/library_defconfig
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index d150690aa..6d167dfba 100644
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--- a/src/arch/host/configs/library_defconfig
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+++ b/src/arch/host/configs/library_defconfig
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@@ -21,8 +21,8 @@ CONFIG_COMP_VOLUME=y
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CONFIG_COMP_VOLUME_LINEAR_RAMP=y
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CONFIG_COMP_VOLUME_WINDOWS_FADE=y
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CONFIG_DEBUG_MEMORY_USAGE_SCAN=n
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-CONFIG_IPC_MAJOR_3=y
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-CONFIG_IPC_MAJOR_4=n
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+CONFIG_IPC_MAJOR_3=n
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+CONFIG_IPC_MAJOR_4=y
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CONFIG_LIBRARY=y
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CONFIG_LIBRARY_STATIC=y
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CONFIG_MATH_IIR_DF2T=y
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```
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Then process a wav file and listen. The example processing component
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is DC blocker. The wav file is first converted with sox to raw 32 bit
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48 kHz stereo format, then processed by testbench, converted back to
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wav.
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```
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cd $SOF_WORKSPACE/sof
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sox --encoding signed-integer /usr/share/sounds/alsa/Front_Center.wav -L -r 48000 -c 2 -b 32 in.raw
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tools/testbench/build_testbench/install/bin/testbench -r 48000 -R 48000 -c 2 -n 2 -b S32_LE -p 1,2 \
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-t tools/build_tools/topology/topology2/development/sof-hda-benchmark-dcblock32.tplg \
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-i in.raw -o out.raw
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sox --encoding signed-integer -L -r 48000 -c 2 -b 32 in.raw out.wav
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aplay out.wav
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```
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The difference in command line is the use of other topology for IPC4
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and use of -p command line option to select pipelines 1 and 2 from
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this topology for scheduling and connecting to input and output files.
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In this topology the host playback pipeline is 1 and the dai playback
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side pipeline is 2. Capture side pipelines would be 3 and 4. And
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running both playback and capture would need more input and output
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files to be added to -i and -o as comma separated. The more advanced
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use cases simulations with IPC4 are still under work.
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The debugging and profiling of IPC4 testench is similar as with IPC3.
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