273 lines
9.4 KiB
C
273 lines
9.4 KiB
C
/** @file
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Defines EcLite offsets used by EcLite driver
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Copyright (c) 2017 - 2021, Intel Corporation. All rights reserved.<BR>
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SPDX-License-Identifier: BSD-2-Clause-Patent
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**/
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#ifndef _ECLITE_FEATURE_H_
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#define _ECLITE_FEATURE_H_
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//
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// FG1 - BAT1
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//
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#define ECLITE_B1ST_OFFSET 0 // 000: Battery State
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#define ECLITE_B1PR_OFFSET 2 // 002: Battery Present Rate
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#define ECLITE_B1RC_OFFSET 4 // 004: Battery Remaining Capacity
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#define ECLITE_B1PV_OFFSET 6 // 006: Battery present voltage
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#define ECLITE_B1DC_OFFSET 8 // 008: Design Capacity
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#define ECLITE_B1FC_OFFSET 10 // 010: Full charge capacity
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#define ECLITE_B1DV_OFFSET 12 // 012: Design Voltage
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#define ECLITE_B1CC_OFFSET 14 // 014: Cycle count
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#define ECLITE_B1CW_OFFSET 16 // 016: Design Capacity of warning
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#define ECLITE_B1LW_OFFSET 18 // 018: Design Capacity of Low
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#define ECLITE_B1T0_OFFSET 20 // 020: Battery Trip Point[0]
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#define ECLITE_B1T1_OFFSET 22 // 022: Battery Trip Point[1]
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#define ECLITE_B1DR_OFFSET 24 // 024: Battery discharge Rate[0]
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#define ECLITE_B1WL_OFFSET 26 // 026: Battery Warning Level
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#define ECLITE_B1LL_OFFSET 28 // 028: Battery Low Level
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// 030-037: Reserved
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//
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// FG1 - BAT2
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//
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#define ECLITE_B2ST_OFFSET 38 // 038: Battery State
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#define ECLITE_B2PR_OFFSET 40 // 040: Battery Present Rate
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#define ECLITE_B2RC_OFFSET 42 // 042: Battery Remaining Capacity
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#define ECLITE_B2PV_OFFSET 44 // 044: Battery present voltage
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#define ECLITE_B2DC_OFFSET 46 // 046: Design Capacity
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#define ECLITE_B2FC_OFFSET 48 // 048: Full charge capacity
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#define ECLITE_B2DV_OFFSET 50 // 050: Design Voltage
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#define ECLITE_B2CC_OFFSET 52 // 052: Cycle count
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#define ECLITE_B2CW_OFFSET 54 // 054: Design Capacity of warning
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#define ECLITE_B2LW_OFFSET 56 // 056: Design Capacity of low
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#define ECLITE_B2T0_OFFSET 58 // 058: Battery Trip Point[0]
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#define ECLITE_B2T1_OFFSET 60 // 060: Battery Trip Point[1]
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#define ECLITE_B2DR_OFFSET 62 // 062: Battery discharge Rate[0]
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#define ECLITE_B2WL_OFFSET 64 // 064: Battery Warning Level
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#define ECLITE_B2LL_OFFSET 66 // 066: Battery Low Level
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// 068-075: Reserved
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//
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// DPTF
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//
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#define ECLITE_S0T1_OFFSET 76 // 076: System0 Temperature 1
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#define ECLITE_S1T1_OFFSET 78 // 078: System1 Temperature 1
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#define ECLITE_S2T1_OFFSET 80 // 080: System2 Temperature 1
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#define ECLITE_S3T1_OFFSET 82 // 082: System3 Temperature
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// 084-099: Reserved
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#define ECLITE_S0A3_OFFSET 100 // 100: Sys0_ALERT3
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#define ECLITE_S0A1_OFFSET 102 // 102: Sys0_ALERT1
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#define ECLITE_S1A3_OFFSET 104 // 104: Sys1_ALERT3
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#define ECLITE_S1A1_OFFSET 106 // 106: Sys1_ALERT1
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#define ECLITE_S2A3_OFFSET 108 // 108: Sys2_ALERT3
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#define ECLITE_S2A1_OFFSET 110 // 110: Sys2_ALERT1
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#define ECLITE_S3A3_OFFSET 112 // 112: Sys3_ALERT3
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#define ECLITE_S3A1_OFFSET 114 // 114: Sys3_ALERT1
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// 116-147: Reserved
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#define ECLITE_S0CT_OFFSET 148 // 148: SYS0_CRIT_TEMP_THR
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#define ECLITE_S1CT_OFFSET 150 // 150: SYS1_CRIT_TEMP_THR
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#define ECLITE_S2CT_OFFSET 152 // 152: SYS2_CRIT_TEMP_THR
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#define ECLITE_S3CT_OFFSET 154 // 154: BATT0_CRIT_TEMP_THR
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// 156-173 Reserved
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#define ECLITE_CTCT_OFFSET 174 // 174: CPU Temp High Threshold
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#define ECLITE_CTHT_OFFSET 176 // 176: CPU Therm Temp
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//
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// CHARGER 1
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//
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#define ECLITE_C1CC_OFFSET 178 // 178: Charger 1 CC
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#define ECLITE_C1CV_OFFSET 180 // 180: Charger 1 CV
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#define ECLITE_C1IN_OFFSET 182 // 182: Charger 1 INLIM
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//
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// CHARGER 2
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//
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#define ECLITE_C2CC_OFFSET 184 // 184: Charger 2 CC
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#define ECLITE_C2CV_OFFSET 186 // 186: Charger 2 CV
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#define ECLITE_C2IN_OFFSET 188 // 188: Charger 2 INLIM
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// 190-207: Reserved
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//
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// POWER BOSS
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//
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// 208: Reserved
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#define ECLITE_PSRC_OFFSET 210 // 210: Current power source
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// 212-223: Reserved
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//
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// PROCESSOR
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//
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// 224-226: Reserved
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//
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//BATTERY 1
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//
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// 228 - 243: Reserved
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//
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//BATTERY 2
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//
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// 244 - 259: Reserved
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//
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// UCSI
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//
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#define ECLITE_MGO1_OFFSET 260 // 260: MessageOut1
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#define ECLITE_MGO2_OFFSET 264 // 264: MessageOut2
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#define ECLITE_MGO3_OFFSET 268 // 268: MessageOut3
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#define ECLITE_MGO4_OFFSET 272 // 272: MessageOut4
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#define ECLITE_CTL1_OFFSET 276 // 272: Control1
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#define ECLITE_CTL2_OFFSET 280 // 280: Control2
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#define ECLITE_MGI1_OFFSET 284 // 284: MessageIn1
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#define ECLITE_MGI2_OFFSET 288 // 288: MessageIn2
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#define ECLITE_MGI3_OFFSET 292 // 292: MessageIn3
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#define ECLITE_MGI4_OFFSET 296 // 296: MessageIn4
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#define ECLITE_CCI_OFFSET 300 // 300: CCI
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#define ECLITE_UCRV_OFFSET 304 // 304: UCSI Revision
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// 260-321: Reserved
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//
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// USB Mode
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//
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#define ECLITE_USBM_OFFSET 322 // 322: Host/Device mode
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// 323: Reserved
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//
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// Haptics
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//
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// 324-325: Reserved
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//
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// BIOS Mode
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//
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// 326-327: Reserved
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//
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// FAN Control
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//
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#define ECLITE_FPWM_OFFSET 328 // 328: PWM control for FAN
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#define ECLITE_TACO_OFFSET 330 // 330: TACHO control for FAN
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// 332-332: Reserved
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//
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// ECLite Event Notify Config
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//
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#define ECLITE_ENCG_OFFSET 333 // 333: ECLite Event Notify Config
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// 334-384: Reserved
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//
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// ECLite region commands
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//
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// Read command: This command is issued from bios to ECLite driver to initiate the Batch read operation from ISH to ECLite opregion
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// Write command: This command is issued from bios to ECLite driver to initiate the Batch write operation from ECLite opregion to ISH
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//
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#define ECLITE_READ_COMMAND 1
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#define ECLITE_WRITE_COMMAND 2
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#define ECLITE_MAX_COMMAND 255
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// ECLite Header Revision
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#define ECLITE_HEADER_REVISION 1
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//
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// Size definition
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//
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#define ECLITE_BYTES_COUNT_0 0
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#define ECLITE_BYTES_COUNT_1 1
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#define ECLITE_BYTES_COUNT_2 2
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#define ECLITE_BYTES_COUNT_3 3
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#define ECLITE_BYTES_COUNT_4 4
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#define ECLITE_BYTES_COUNT_5 5
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#define ECLITE_BYTES_COUNT_6 6
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#define ECLITE_BYTES_COUNT_7 7
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#define ECLITE_BYTES_COUNT_8 8
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#define ECLITE_BYTES_COUNT_9 9
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#define ECLITE_BYTES_COUNT_10 10
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#define ECLITE_BYTES_COUNT_11 11
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#define ECLITE_BYTES_COUNT_12 12
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#define ECLITE_BYTES_COUNT_13 13
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#define ECLITE_BYTES_COUNT_14 14
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#define ECLITE_BYTES_COUNT_15 15
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#define ECLITE_BYTES_COUNT_16 16
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#define ECLITE_BYTES_COUNT_17 17
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#define ECLITE_BYTES_COUNT_18 18
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#define ECLITE_BYTES_COUNT_19 19
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#define ECLITE_BYTES_COUNT_20 20
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#define ECLITE_BYTES_COUNT_21 21
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#define ECLITE_BYTES_COUNT_22 22
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#define ECLITE_BYTES_COUNT_23 23
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#define ECLITE_BYTES_COUNT_24 24
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#define ECLITE_BYTES_COUNT_25 25
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#define ECLITE_BYTES_COUNT_26 26
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#define ECLITE_BYTES_COUNT_27 27
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#define ECLITE_BYTES_COUNT_28 28
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#define ECLITE_BYTES_COUNT_29 29
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#define ECLITE_BYTES_COUNT_30 30
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#define ECLITE_BYTES_COUNT_31 31
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#define ECLITE_BYTES_COUNT_32 32
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#define ECLITE_BYTES_COUNT_256 256
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#define ECLITE_MAX_BYTES_SUPPORTED 384
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//
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// ISH to BIOS Notifications
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//
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#define ECLITE_CHARGER_CONNECT_EVENT 1
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#define ECLITE_CHARGER_DISCONNECT_EVENT 2
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#define ECLITE_BATTERY_EVENT 3
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#define ECLITE_SYSTEM0_TEMP_ALERT 4
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#define ECLITE_SYSTEM1_TEMP_ALERT 5
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#define ECLITE_SYSTEM2_TEMP_ALERT 6
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#define ECLITE_BATTERY1_TEMP_ALERT 7
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#define ECLITE_BATTERY2_TEMP_ALERT 8
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#define ECLITE_PMIC_TEMP_ALERT 9
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#define ECLITE_SYSTEM3_TEMP_ALERT 10
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#define ECLITE_DEVICE_CONNECT_EVENT 11
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#define ECLITE_UCSI_UPDATE_EVENT 12
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#define ECLITE_DEVICE_DISCONNECT_EVENT 13
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#define ECLITE_BATTERY_CYCLE_COUNT_EVENT 14
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#define ECLITE_CPU_TEMPERATURE_UPDATE 15
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#define ECLITE_PSRC_CHANGE_EVENT 17
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//
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// BIOS to ISH Notifications
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//
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#define ECLITE_DEFAULT_UPDATE 0 // ISH Firmware Ignores the Command completion notfication if it is 0
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#define ECLITE_BATTERY_TRIP_POINT_UPDATE 1
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#define ECLITE_WARNING_BATTERY_LEVEL_UPDATE 2
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#define ECLITE_LOW_BATTERY_LEVEL_UPDATE 3
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#define ECLITE_CRITICAL_TEMP_CONFIG_UPDATE 4
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#define ECLITE_THERMAL_ALERT_THERHSOLD_UPDATE 6
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#define ECLITE_UCSI_UPDATE 10
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#define ECLITE_CHARGER_UPDATE 12
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#define ECLITE_OS_EVENT_PWM_UPDATE 15
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//
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// Device specific macros
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//
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#define ECLITE_PSRC_BIT_MASK 7 // Currently only one Source Type C charger (no AC Brick)
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#define ECLITE_AC_PRESENT 1
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#define ECLITE_DC_PRESENT 0
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//
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// Boot time BIOS to ISH Support
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//
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typedef union {
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UINT32 Header;
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struct {
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UINT32 HeaderVersion : 2; //< 0:1 - Header version
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UINT32 DataType : 2; //< 2:3 - Data Type 0x01: Data , 0x02: Event Notification
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UINT32 DataReadWrite : 2; //< 4:5 - Data Read/Write 0x01: Read 0x02: Write
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UINT32 DataReadWriteOffset : 9; //< 6:14 - Data Read/write Offset
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UINT32 DataLength : 9; //< 15:23 - Data payload Size in Bytes
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UINT32 CompletionCode : 8; //< 24:31 - Completion code
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} Fields;
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} HECI_ECLITE_HEADER;
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typedef struct {
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HECI_ECLITE_HEADER EcLiteHeader;
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UINT8 *Data; //< Data buffer to be sent/updated based on the datalength
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} HECI_BIOS_ISH_MSG;
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#endif // _ECLITE_FEATURE_H_
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