65 lines
1.7 KiB
C
65 lines
1.7 KiB
C
/** @file
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This file declares various data structures used in CPU reference code.
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Copyright (c) 2004 - 2017, Intel Corporation. All rights reserved.<BR>
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SPDX-License-Identifier: BSD-2-Clause-Patent
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**/
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#ifndef _CPU_DATA_STRUCT_H
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#define _CPU_DATA_STRUCT_H
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typedef UINT32 CPU_STATE_CHANGE_CAUSE;
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///
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/// Structure to hold the return value of AsmCpuid instruction
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///
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typedef struct {
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UINT32 RegEax; ///< Value of EAX.
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UINT32 RegEbx; ///< Value of EBX.
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UINT32 RegEcx; ///< Value of ECX.
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UINT32 RegEdx; ///< Value of EDX.
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} EFI_CPUID_REGISTER;
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#pragma pack(1)
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///
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/// MSR_REGISTER definition as a Union of QWORDS, DWORDS and BYTES
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///
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typedef union _MSR_REGISTER {
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UINT64 Qword; ///< MSR value in 64 bit QWORD.
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///
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/// MSR value represented in two DWORDS
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///
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struct {
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UINT32 Low; ///< Lower DWORD of the 64 bit MSR value.
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UINT32 High; ///< Higher DWORD of the 64 bit MSR value.
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} Dwords;
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///
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/// MSR value represented in eight bytes.
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///
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struct {
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UINT8 FirstByte; ///< First byte of the 64 bit MSR value.
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UINT8 SecondByte; ///< Second byte of the 64 bit MSR value.
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UINT8 ThirdByte; ///< Third byte of the 64 bit MSR value.
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UINT8 FouthByte; ///< Fourth byte of the 64 bit MSR value.
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UINT8 FifthByte; ///< Fifth byte of the 64 bit MSR value.
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UINT8 SixthByte; ///< Sixth byte of the 64 bit MSR value.
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UINT8 SeventhByte; ///< Seventh byte of the 64 bit MSR value.
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UINT8 EighthByte; ///< Eigth byte of the 64 bit MSR value.
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} Bytes;
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} MSR_REGISTER;
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///
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/// Store BIST data for BSP.
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///
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typedef struct {
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UINT32 ApicId; ///< APIC ID
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UINT32 Health; ///< BIST result
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} BIST_HOB_DATA;
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#pragma pack()
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#endif
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