338 lines
14 KiB
YAML
338 lines
14 KiB
YAML
## @file
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#
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# Slim Bootloader CFGDATA Option File.
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#
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# Copyright (c) 2020 - 2022, Intel Corporation. All rights reserved.<BR>
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# SPDX-License-Identifier: BSD-2-Clause-Patent
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#
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##
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- $ACTION :
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page : PCI
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- PCIE_CFG_DATA :
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- !expand { CFGHDR_TMPL : [ PCIE_CFG_DATA, 0xA00, 0, 0 ] }
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- !expand { PCI_TMPL : [ IIO_RES ] }
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- IioRes :
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- $STRUCT :
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name : PCI IIO Res for Soc 0
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help : >
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PCI IIO Res for Soc 0
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struct : IIO_RES
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- Enable :
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name : Enable PCI IIO Res allocation
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type : Combo
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option : $EN_DIS
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help : >
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Enable PCI IIO Res allocation
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length : 1b
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value : 1
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- Rsvd1 :
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name : Reserved
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type : Reserved
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length : 31b
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value : 0
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- IoBase :
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name : Io Base
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type : Table
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option : 0:2:HEX
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help : >
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Io Base
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struct : UINT16
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length : 0x10
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value : {0:0W, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000 }
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condition : $(COND_IIO_PCI_RES_EN)
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- IoLimit :
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name : Io Limit
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type : Table
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option : 0:2:HEX
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help : >
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Io Base
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struct : UINT16
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length : 0x10
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value : {0:0W, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000 }
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condition : $(COND_IIO_PCI_RES_EN)
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- LowMmioBase :
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name : Low Mmio Base
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type : Table
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option : 0:4:HEX
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help : >
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Low Mmio Base
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struct : UINT32
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length : 0x20
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value : {0:0D, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 }
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condition : $(COND_IIO_PCI_RES_EN)
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- LowMmioLimit :
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name : Low Mmio Limit
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type : Table
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option : 0:4:HEX
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help : >
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Low Mmio Limit
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struct : UINT32
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length : 0x20
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value : {0:0D, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 }
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condition : $(COND_IIO_PCI_RES_EN)
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- HighMmioBase :
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name : High Mmio Base
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type : Table
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option : 0:8:HEX
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help : >
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High Mmio Base
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struct : UINT64
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length : 0x40
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value : {0:0Q, 0x0000000000000000, 0x0000000000000000, 0x0000000000000000, 0x0000000000000000, 0x0000000000000000, 0x0000000000000000, 0x0000000000000000, 0x0000000000000000 }
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condition : $(COND_IIO_PCI_RES_EN)
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- HighMmioLimit :
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name : High Mmio Limit
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type : Table
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option : 0:8:HEX
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help : >
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High Mmio Limit
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struct : UINT64
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length : 0x40
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value : {0:0Q, 0x0000000000000000, 0x0000000000000000, 0x0000000000000000, 0x0000000000000000, 0x0000000000000000, 0x0000000000000000, 0x0000000000000000, 0x0000000000000000 }
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condition : $(COND_IIO_PCI_RES_EN)
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- !expand { PCI_TMPL : [ IIO_RP ] }
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- IIOPciePortBifurcation :
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name : IIO PCIe Port 1 Bifurcation
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help : >
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IIO PCI Express port bifurcation for selected slot(s).
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type : Combo
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option : 0xFF:Auto, 0:X4X4X4X4, 1:X4X4X8, 2:X8X4X4, 3:X8X8, 4:X16
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length : 0x01
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value : 0xFF
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- IIoPcieHotPlugEnable :
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name : IIO PCIe Hot Plug
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type : Combo
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option : 0:Disabled, 1:Enabled
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help : >
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Enable / Disable IIO PcieHotPlug
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length : 1
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value : 0
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- IIoPcieHotPlugOnPort :
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name : IIO PCIe Hot Plug Capable on Port 1A/1B/1C/1D
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type : EditNum, HEX, (0x00,0xFFFFFFFF)
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help : >
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Enable / Disable IIO PCIe Hot Plug Capable on Port 1A/1B/1C/1D
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0x00:Disabled, 0x01:Enabled
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length : 4
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condition : $(COND_IIO_PCIE_HP_EN)
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value : { 0x00, 0x00, 0x00, 0x00 }
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- IIoPcieSurpriseHotPlugOnPort :
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name : IIO PCIe Surprise Hot Plug Capable on Port 1A/1B/1C/1D
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type : EditNum, HEX, (0x00,0xFFFFFFFF)
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help : >
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Enable / Disable IIO PCIe Surprise Hot Plug Capable on Port 1A/1B/1C/1D
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0x00:Disabled, 0x01:Enabled
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length : 4
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condition : $(COND_IIO_PCIE_HP_EN)
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value : { 0x00, 0x00, 0x00, 0x00 }
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- IIoPcieDeEmphasis :
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name : IIO PCIe DeEmphasis (R-Link, Port 1A, Port 1B, Port 1C and Port 1D)
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type : EditNum, HEX, (0x00,0xFFFFFFFFFF)
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help : >
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Desired DeEmphasis level for IIO PCIe R-Link, Port 1A, Port 1B, Port 1C and Port 1D
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0x00:6dB, 0x01:3.5dB
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length : 5
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value : { 0x01, 0x01, 0x01, 0x01, 0x01 }
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- IIoPcieLinkSpeed :
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name : IIO PCIe Link Speed (R-Link, Port 1A, Port 1B, Port 1C and Port 1D)
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type : EditNum, HEX, (0x00,0xFFFFFFFFFF)
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help : >
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Desired Link Speed for IIO PCIe R-Link, Port 1A, Port 1B, Port 1C and Port 1D
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0x00:AUTO, 0x01:GEN1, 0x02:GEN2, 0x03:GEN3, 0x04:GEN4(Not applicable to R-Link)
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length : 5
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value : { 0x00, 0x00, 0x00, 0x00, 0x00 }
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- IIoPcieAspm :
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name : IIO PCIe Aspm (R-Link, Port 1A, Port 1B, Port 1C and Port 1D)
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type : EditNum, HEX, (0x00,0xFFFFFFFFFF)
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help : >
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Desired Active state power management settings for IIO PCIe R-Link, Port 1
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0x00:Disabled, 0x04:Auto
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length : 5
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value : { 0x04, 0x04, 0x04, 0x04, 0x04 }
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- BifurcationPcie0 :
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name : PCH PCIe Controller 0 Bifurcation
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type : Combo
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option : 5:4x2, 6:1x4 2x2, 7:2x2 1x4, 8:2x4, 9:1x8
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help : >
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Configure PCI Express controller 0 bifurcation.
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length : 0x01
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value : 9
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- BifurcationPcie1 :
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name : PCH PCIe Controller 1 Bifurcation
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type : Combo
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option : 5:4x2, 6:1x4 2x2, 7:2x2 1x4, 8:2x4, 9:1x8
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help : >
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Configure PCI Express controller 1 bifurcation.
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length : 0x01
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value : 5
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- BifurcationPcie2 :
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name : PCH PCIe Controller 2 Bifurcation
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type : Combo
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option : 5:4x2, 6:1x4 2x2, 7:2x2 1x4, 8:2x4, 9:1x8
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help : >
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Configure PCI Express controller 2 bifurcation.
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length : 0x01
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value : 6
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- IIOPciePort2Bifurcation :
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name : IIO PCIe Port 2 Bifurcation
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help : >
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IIO PCI Express port 2 bifurcation for selected slot(s).
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type : Combo
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option : 0xFF:Auto, 0:X4X4X4X4, 1:X4X4X8, 2:X8X4X4, 3:X8X8, 4:X16
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length : 0x01
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value : 0xFF
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- IIoPciePort2DeEmphasis :
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name : IIO PCIe Port 2 DeEmphasis (Port 2A, Port 2B, Port 2C and Port 2D)
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type : EditNum, HEX, (0x00,0xFFFFFFFF)
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help : >
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Desired DeEmphasis level for IIO PCIe Port 2A, Port 2B, Port 2C and Port 2D
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0x00:6dB, 0x01:3.5dB
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length : 4
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value : { 0x01, 0x01, 0x01, 0x01 }
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- IIoPciePort2LinkSpeed :
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name : IIO PCIe Link Speed (Port 2A, Port 2B, Port 2C and Port 2D)
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type : EditNum, HEX, (0x00,0xFFFFFFFF)
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help : >
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Desired Link Speed for IIO PCIe Port 2A, Port 2B, Port 2C and Port 2D
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0x00:AUTO, 0x01:GEN1, 0x02:GEN2, 0x03:GEN3, 0x04:GEN4
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length : 4
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value : { 0x00, 0x00, 0x00, 0x00 }
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- IIoPciePort2Aspm :
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name : IIO PCIe Aspm (Port 2A, Port 2B, Port 2C and Port 2D)
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type : EditNum, HEX, (0x00,0xFFFFFFFFFF)
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help : >
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Desired Active state power management settings for IIO PCIe Port 2
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0x00:Disabled, 0x04:Auto
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length : 4
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value : { 0x04, 0x04, 0x04, 0x04 }
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- IIoPciePort2HotPlugOnPort :
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name : IIO PCIe Port 2 Hot Plug Capable on Port 2A/2B/2C/2D
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type : EditNum, HEX, (0x00,0xFFFFFFFF)
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help : >
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Enable / Disable IIO PCIe Port 2 Hot Plug Capable on Port 2A/2B/2C/2D
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0x00:Disabled, 0x01:Enabled
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length : 4
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condition : $(COND_IIO_PCIE_HP_EN)
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value : { 0x00, 0x00, 0x00, 0x00 }
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- IIoPciePort2SurpriseHotPlugOnPort :
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name : IIO PCIe Port 2 Surprise Hot Plug Capable on Port 2A/2B/2C/2D
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type : EditNum, HEX, (0x00,0xFFFFFFFF)
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help : >
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Enable / Disable IIO PCIe Port 2 Surprise Hot Plug Capable on Port 2A/2B/2C/2D
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0x00:Disabled, 0x01:Enabled
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length : 4
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condition : $(COND_IIO_PCIE_HP_EN)
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value : { 0x00, 0x00, 0x00, 0x00 }
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- PchDmiAspm :
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name : PCH DMI ASPM
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type : Combo
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option : 0:Disabled, 1:Enabled
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help : >
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Enable / Disable L1 ASPM for Rlink
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length : 1
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value : 1
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- PciePortClkGateEnable :
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name : PCI-E port Clock Gating
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type : EditNum, HEX, (0x00,0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF)
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help : >
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Enable / Disable PCI-E Clock Gating for each port First byte represents Clock gating
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for port 1A,Second byte for port 2A... respectively for each PCI-E Port. Each byte
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takes value 0x00(Disable)~0x01(Enable).
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length : 21
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value : { 0x1, 0x1, 0x1, 0x1, 0x1, 0x1, 0x1, 0x1, 0x1, 0x1, 0x1, 0x1, 0x1, 0x1, 0x1, 0x1, 0x1, 0x1, 0x1, 0x1, 0x1 }
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- Rsvd2 :
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name : Reserved2
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type : Reserved
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length : 1
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value : 0
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- !expand { PCI_TMPL : [ PCH_RP ] }
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- PchRpConfig :
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- $STRUCT :
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name : Pcie Rp Configuration
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help : >
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Configure Pcie Root Port
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struct : PCH_RP_CFG
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- ClockGatingEnabled :
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name : PCI Express Clock Gating
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type : Combo
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option : 0:Disabled, 1:Enabled
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help : >
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Enable / Disable PCI Express Clock Gating
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length : 1
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value : 1
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- RlinkClockGating :
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name : Rlink CG Enable
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type : Combo
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option : 0:Disabled, 1:Enabled
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help : >
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Enable / Disable Rlink Clock Gating
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length : 1
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value : 1
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- PcieRootPortEn :
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name : PcieRootPortEn
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type : EditNum, HEX, (0x00,0xFFFF)
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help : >
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0:Disable, 1:Enable PcieRootPort from 1 to 12, each bit represent a port(bit0-bit11)
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and last nibble is unused. For example, bit0 controls PcieRootPortPort 1, bit1
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controls PcieRootPortPort 2...
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length : 2
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value : 0x0FFF
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- LinkSpeed :
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name : Link Speed
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type : EditNum, HEX, (0x00,0xFFFFFFFFFFFFFFFFFFFFFFFF)
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help : >
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1:GEN1, 2:GEN2, 3:GEN3
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length : 12
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value : { 0x3, 0x3, 0x3, 0x3, 0x3, 0x3, 0x3, 0x3, 0x3, 0x3, 0x3, 0x3 }
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- Aspm :
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name : ASPM(Active State Power Management)
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type : EditNum, HEX, (0x00,0xFFFFFFFFFFFFFFFFFFFFFFFF)
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help : >
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0:Disabled, 1:L0, 2:L1, 3:L0SL1
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length : 12
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value : { 0x2, 0x2, 0x2, 0x2, 0x2, 0x2, 0x2, 0x2, 0x2, 0x2, 0x2, 0x2 }
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- ConnectionType :
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name : Connection Type
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type : EditNum, HEX, (0x00,0xFFFFFFFFFFFFFFFFFFFFFFFF)
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help : >
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0:Built-In, 1:Slot
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length : 12
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value : { 0x1, 0x1, 0x1, 0x1, 0x1, 0x1, 0x1, 0x1, 0x1, 0x1, 0x1, 0x1 }
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- HotPlug :
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name : HotPlug
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type : EditNum, HEX, (0x00,0xFFFFFFFFFFFFFFFFFFFFFFFF)
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help : >
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0:Disable, 1:Enable
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length : 12
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value : { 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0 }
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- VppOverride :
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name : Vpp Override
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type : EditNum, HEX, (0x00,0xFFFFFFFFFFFF)
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help : >
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Each one of 12 PCH Port VppOverrides is represented by a nibble. A nibble takes value 0(Disable)~1(Enable).
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length : 12
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value : { 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0 }
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- VppPort :
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name : Vpp Port
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type : EditNum, HEX, (0x00,0xFFFFFFFFFFFF)
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help : >
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Each one of 12 PCH VppPorts is represented by a nibble. A nibble takes value 0~1.
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length : 12
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value : { 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0 }
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- VppAddress :
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name : Vpp Address
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type : EditNum, HEX, (0x00,0xFFFFFFFFFFFF)
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help : >
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Each one of 12 PCH VppAddresses is represented by a nibble. A nibble takes value 0~7.
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length : 12
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value : { 0x07, 0x7, 0x7, 0x7, 0x7, 0x7, 0x7, 0x7, 0x7, 0x7, 0x7, 0x7 }
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- PtmEnable :
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name : PTM Enable
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type : EditNum, HEX, (0x00,0xFFFFFFFFFFFF)
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help : >
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Each one of 12 PCIe Port PTM Enable is represented by a nibble. A nibble takes value 0~1.
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length : 12
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value : { 0x1, 0x1, 0x1, 0x1, 0x1, 0x1, 0x1, 0x1, 0x1, 0x1, 0x1, 0x1 }
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