144 lines
4.1 KiB
C
144 lines
4.1 KiB
C
/** @file
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Copyright (c) 1999 - 2014, Intel Corporation. All rights reserved.<BR>
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SPDX-License-Identifier: BSD-2-Clause-Patent
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Module Name:
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IgdOpRegionDefines.h
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Abstract:
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This is part of the implementation of an Intel Graphics drivers OpRegion /
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Software SCI interface between system BIOS, ASL code, and Graphics drivers.
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Supporting Specification: OpRegion / Software SCI SPEC 0.70
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Acronyms:
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IGD: Internal Graphics Device
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NVS: ACPI Non Volatile Storage
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OpRegion: ACPI Operational Region
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VBT: Video BIOS Table (OEM customizable data)
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**/
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#ifndef _IGD_OP_REGION_DEFINES_H_
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#define _IGD_OP_REGION_DEFINES_H_
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//
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// OpRegion (Miscellaneous) #defines.
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//
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// OpRegion Header #defines.
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//
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#define HEADER_SIGNATURE "IntelGraphicsMem"
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#define HEADER_SIZE 0x2000
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#define HEADER_OPREGION_VER 0x0200
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#define HEADER_OPREGION_REV 0x00
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#define IGD_OPREGION_VERSION 2
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//
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//For VLV Tablet, MailBOX2(SCI)is not supported.
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//
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#define HEADER_MBOX_SUPPORT (HD_MBOX4 + HD_MBOX3 + HD_MBOX1)
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#define HD_MBOX1 BIT0
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#define HD_MBOX2 BIT1
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#define HD_MBOX3 BIT2
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#define HD_MBOX4 BIT3
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#define HD_MBOX5 BIT4
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#define SVER_SIZE 32
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//
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//Audio Type support for VLV2 A0
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//
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#define AUDIO_TYPE_SUPPORT_MASK 0xFFFFFFF3
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#define NO_AUDIO_SUPPORT (0<<2)
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#define HD_AUDIO_SUPPORT (1<<2)
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#define LPE_AUDIO_SUPPORT (2<<2)
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#define AUDIO_TYPE_FIELD_MASK 0xFFFFFFEF
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#define AUDIO_TYPE_FIELD_VALID (1<<4)
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#define AUDIO_TYPE_FIELD_INVALID (0<<4)
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//
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// OpRegion Mailbox 1 EQUates.
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//
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// OpRegion Mailbox 3 EQUates.
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//
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#define ALS_ENABLE BIT0
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#define BLC_ENABLE BIT1
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#define BACKLIGHT_BRIGHTNESS 0xFF
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#define FIELD_VALID_BIT BIT31
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#define WORD_FIELD_VALID_BIT BIT15
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#define PFIT_ENABLE BIT2
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#define PFIT_OPRN_AUTO 0x00000000
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#define PFIT_OPRN_SCALING 0x00000007
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#define PFIT_OPRN_OFF 0x00000000
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#define PFIT_SETUP_AUTO 0
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#define PFIT_SETUP_SCALING 1
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#define PFIT_SETUP_OFF 2
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#define INIT_BRIGHT_LEVEL 0x64
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#define PFIT_STRETCH 6
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#define PFIT_CENTER 1
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//
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// GT RELATED EQUATES
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//
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#define GTT_MEM_ALIGN 22
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#define GTTMMADR_SIZE_4MB 0x400000
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#define IGD_BUS 0x00
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#define IGD_DEV 0x02
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#define IGD_FUN_0 0x00
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#define IGD_R_VID 0x00
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#define IGD_R_CMD 0x04
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#define IGD_R_GTTMMADR 0x10
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#define IGD_R_BGSM 0x70
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#define LOCKBIT BIT0
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#define IGD_VID 0x8086
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#define IGD_DID 0xA001
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#define IGD_MGGC_OFFSET 0x0050 //GMCH Graphics Control Register 0x50
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#define IGD_BSM_OFFSET 0x005C //Base of Stolen Memory
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#define IGD_SWSCI_OFFSET 0x00E0 //Software SCI 0xE0 2
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#define IGD_ASLE_OFFSET 0x00E4 //System Display Event Register 0xE4 4
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#define IGD_ASLS_OFFSET 0x00FC // ASL Storage
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//
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// Video BIOS / VBT #defines
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//
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#define IGD_DID_VLV 0x0F31
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#define OPTION_ROM_SIGNATURE 0xAA55
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#define VBIOS_LOCATION_PRIMARY 0xC0000
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#define VBT_SIGNATURE SIGNATURE_32 ('$', 'V', 'B', 'T')
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//
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// Typedef stuctures
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//
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#pragma pack (1)
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typedef struct {
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UINT8 HeaderSignature[20];
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UINT16 HeaderVersion;
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UINT16 HeaderSize;
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UINT16 HeaderVbtSize;
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UINT8 HeaderVbtCheckSum;
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UINT8 HeaderReserved;
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UINT32 HeaderOffsetVbtDataBlock;
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UINT32 HeaderOffsetAim1;
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UINT32 HeaderOffsetAim2;
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UINT32 HeaderOffsetAim3;
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UINT32 HeaderOffsetAim4;
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UINT8 DataHeaderSignature[16];
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UINT16 DataHeaderVersion;
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UINT16 DataHeaderSize;
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UINT16 DataHeaderDataBlockSize;
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UINT8 CoreBlockId;
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UINT16 CoreBlockSize;
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UINT16 CoreBlockBiosSize;
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UINT8 CoreBlockBiosType;
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UINT8 CoreBlockReleaseStatus;
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UINT8 CoreBlockHWSupported;
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UINT8 CoreBlockIntegratedHW;
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UINT8 CoreBlockBiosBuild[4];
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UINT8 CoreBlockBiosSignOn[155];
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} VBIOS_VBT_STRUCTURE;
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#pragma pack ()
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#endif
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