60 lines
2.0 KiB
C
60 lines
2.0 KiB
C
/** @file
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Chipset definition for ME Devices.
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Copyright (c) 2020, Intel Corporation. All rights reserved.<BR>
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SPDX-License-Identifier: BSD-2-Clause-Patent
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**/
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#ifndef _ME_CHIPSET_H_
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#define _ME_CHIPSET_H_
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///
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/// ME Bus and Device Info
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///
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#define ME_BUS 0
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#define ME_DEVICE_NUMBER 24
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#define HECI_FUNCTION_NUMBER 0x00
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#define HECI2_FUNCTION_NUMBER 0x01
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#define HECI3_FUNCTION_NUMBER 0x04
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#define HECI4_FUNCTION_NUMBER 0x06
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#define R_ME_HFS 0x40
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#define ME_OPERATION_MODE_SPS_IGNITION 0x07
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typedef enum {
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HECI1_DEVICE = HECI_FUNCTION_NUMBER,
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HECI2_DEVICE = HECI2_FUNCTION_NUMBER,
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HECI4_DEVICE = HECI4_FUNCTION_NUMBER,
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HECI3_DEVICE = HECI3_FUNCTION_NUMBER,
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HECI_INVALID_DEVICE = 0xFF
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} HECI_DEVICE;
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//
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// HFSTS1, offset 40h
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//
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typedef union {
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UINT32 ul;
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struct {
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UINT32 CurrentState : 4; // 0:3 - Current State
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UINT32 ManufacturingMode : 1; // 4 Manufacturing Mode
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UINT32 FptBad : 1; // 5 FPT(Flash Partition Table ) Bad
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UINT32 MeOperationState : 3; // 6:8 - ME Operation State
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UINT32 FwInitComplete : 1; // 9
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UINT32 FtBupLdFlr : 1; // 10 - This bit is set when firmware is not able to load BRINGUP from the fault tolerant (FT) code.
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UINT32 FwUpdateInprogress : 1; // 11
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UINT32 ErrorCode : 4; // 12:15 - Error Code
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UINT32 MeOperationMode : 4; // 16:19 - Management Engine Current Operation Mode
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UINT32 MeRstCnt : 4; // 20:23 - ME reset counter
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UINT32 MeBootOptionsPresent : 1; // 24 - If this bit is set, a Boot Options is present
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UINT32 AckData : 3; // 25:27 Ack Data
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UINT32 BiosMessageAck : 4; // 28:31 BIOS Message Ack
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} r;
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} HECI_FWS_REGISTER;
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//
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// HECI PCI Access Macro
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//
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#define HeciPciRead32(Register) PciRead32 (PCI_LIB_ADDRESS (ME_BUS, ME_DEVICE_NUMBER, HECI_FUNCTION_NUMBER, Register))
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#endif // _ME_CHIPSET_H_
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