Commit Graph

874 Commits

Author SHA1 Message Date
jinjhuli d1b404fbac Rename cnl file to cml & cmlv
Rename file with "cnl" to "cml" & "cmlv".
Rename include file's name in related file.

Signed-off-by: jinjhuli <jin.jhu.lim@intel.com>
2020-10-13 08:07:29 -07:00
Sai Talamudupula 83174d7af2 Fix permission check during Spi access
Check for Write access permission during
Write/Erase Flash cycles for BIOS/FLAHD regions.

Signed-off-by: Sai Talamudupula <sai.kiran.talamudupula@intel.com>
2020-10-12 19:23:11 -07:00
Maurice Ma 1608235af1 Resync BaseTools with latest EDKII stable tag
This patch synced BaseTools with EDKII stable tag:
  edk2-stable202008

Signed-off-by: Maurice Ma <maurice.ma@intel.com>
2020-10-12 16:02:35 -07:00
Maurice Ma 1002d880a2 Enable mixed payload mode calling
Since SBL could be built into either x86 or x64 mode, and the payload
can also be x86 or x64 mode. When mixed modes are used, it is required
to switch to proper mode first before calling into payload entrypoint.
This patch added this check to switch to required mode before calling
into payload entry point.

Signed-off-by: Maurice Ma <maurice.ma@intel.com>
2020-10-12 13:01:07 -07:00
Maurice Ma 9a4407018d [QEMU] Fix NOOPT build failure
This patch fixed NOOPT build failure for QEMU.
It fixed #871.

Signed-off-by: Maurice Ma <maurice.ma@intel.com>
2020-10-12 13:00:44 -07:00
jinjhuli f87c9a7d2c [CMLV] Code clean-up
Removed empty lines, unused defines, comments,
empty files and empty #ifdef with clean-up tool.

Signed-off-by: jinjhuli <jin.jhu.lim@intel.com>
2020-10-09 15:18:44 -07:00
jinjhuli 76728a2e3c [CML] Code clean-up
Removed empty lines, unused defines, comments,
empty files and empty #ifdef with clean-up tool.

Signed-off-by: jinjhuli <jin.jhu.lim@intel.com>
2020-10-09 15:17:23 -07:00
Sai Talamudupula be30a11910 Enhance eMMC driver
Improve the HS200 switch code to set bus mode
correctly on some eMMC cards.

Signed-off-by: Sai Talamudupula <sai.kiran.talamudupula@intel.com>
2020-10-08 17:04:38 -07:00
Raghava Gudla 3ec4e03a74 Expand HECI service to add more API's
This patch expanded HECI service to include send, receive and
reset interface functions. This helps in making firmwareupdatelib.c
and PSDlib common across platforms.

Signed-off-by: Raghava Gudla <raghava.gudla@intel.com>
2020-10-08 15:40:00 -07:00
Aiden Park 26a24f5ab2 [CFL] Fix the ucode checkout issue
This will fix the ucode repo checkout issue on 'cfl' target.

FYI, here are simple steps to reproduce.
1) Build 'apl' target first
2) Build 'cfl' target -> fails to checkout ucode repo

Signed-off-by: Aiden Park <aiden.park@intel.com>
2020-10-08 13:07:46 -07:00
Maurice Ma dd8fe22046 Add MultiBoot support for X64 build
During X64 enabling, there was a pending task to enable 32bit
MultiBoot support. It is not implemented.  This patch added the
support to allow X64 SBL to boot a 32bit MB image through thunking.
As part of this patch, the ThunkLib is separated from the FspApiLib
so that it can be shared by other component.

Signed-off-by: Maurice Ma <maurice.ma@intel.com>
2020-10-07 14:20:50 -07:00
Aiden Park 89a0f3491f Move ME_BIOS_PAYLOAD to silicon specific directory
The structure of ME_BIOS_PAYLOAD varies on silicons. So, it's moved to
silicon directory and common structures are in MeBiosPayloadDataCommon.h.
- MeBiosPayloadDataCommon.h in CommonSocPkg
- MeBiosPayloadData.h in the specific silicon package

Additionally, DEBUG_VERBOSE message level is used for HeciCore.

Signed-off-by: Aiden Park <aiden.park@intel.com>
2020-10-06 13:21:31 -07:00
Aiden Park 40ded551cd [APL] Use the common HeciLib and Apollolake MeChipsetLib
This allows APL target to use the common HECI library.
The APL target uses the common HeciLib from CommonSocPkg,
and overrides MeChipsetLib for Apollake specific APIs.

Signed-off-by: Aiden Park <aiden.park@intel.com>
2020-10-06 13:21:31 -07:00
Aiden Park bbecda8c27 [CFL] Use the common HECI library
This allows CFL target to use the common HECI library as it is.
The CFL target uses both HeciLib and MeChipsetLib from CommonSocPkg,
and the unnecessary files are cleaned-up.

Signed-off-by: Aiden Park <aiden.park@intel.com>
2020-10-06 13:21:31 -07:00
Aiden Park ea3741581d [HECI] Add a silicon common HECI Library
This adds a common HECI library for the same APIs on all platforms.
New MeChipsetLib is intruduced for the silicon specific HECI APIs.
- Silicon/CommonSocPkg/Library/HeciLib
- Silicon/CommonSocPkg/Library/MeChipsetLib

Signed-off-by: Aiden Park <aiden.park@intel.com>
2020-10-06 13:21:31 -07:00
James Gutbub 467c804172 Add IGD Op Region version macros
Different SoCs can use different versions of
Gen graphics and subsequently may use different
versions of the IGD Op Region; the OVER variable
will determine how the OS GFX driver interprets
the IGD Op Region provided in ACPI space.

Signed-off-by: James Gutbub <james.gutbub@intel.com>
2020-10-02 21:20:11 -07:00
Guo Dong 05ac9b4e2d
Enhance FSP build path support (#859)
Currently the build tool will always find FSP binaries from
Silicon'\self._board.SILICON_PKG_NAME\FspBin folder.
This patch enhance the build tool to support to get FSP from
_FSP_PATH_NAME. If _FSP_PATH_NAME is not specified, the default
behavior is same with current build.

If user wants to use a different one, they could override it
in BoardConfig.py as below:
self._FSP_PATH_NAME  = 'Silicon/Fsp'

Signed-off-by: Guo Dong <guo.dong@intel.com>
2020-09-29 15:25:03 -07:00
Maurice Ma e5329259c1
Enable extra including path for build (#858)
This patch added support to allow platform to add specific include
folders for the build. All include paths will be relative to the
SBL $(WORKSPACE).

To eanable this feature, please add similar definitions as below
into BoardConfig.py. For example,
  self._EXTRA_INC_PATH = ['Silicon/QemuSocPkg/Include/Fsp']

Signed-off-by: Maurice Ma <maurice.ma@intel.com>
2020-09-28 20:15:22 -07:00
jinjhuli 8bb91f5841 Enable cml & cmlv boot options in travis
This patch enabled CML & CMLV test script for travis build.

Signed-off-by: jinjhuli <jin.jhu.lim@intel.com>
2020-09-21 08:39:24 -07:00
jinjhuli b1f6cd0f55 [CML] Fix travis build fail in linux system
Fix payload size to 0x00028000.

Signed-off-by: jinjhuli <jin.jhu.lim@intel.com>
2020-09-21 07:47:29 -07:00
Raghava Gudla 418e31ad38 [CFL] Added support for mutiple VBT
This patch did the following

1) Added common routines LocateVbtByImageId to look for VBT image using
   ImageId provided by configuration data and GetVbtAddress.
2) GetVbtAddress routine will provide abstaction for all platforms
   irrespective of multiple VBT or single VBT used by the platform.
3) LocateVbtByImageId routine is moved from platform local function to
   common package.
4) VbtImageId configuration option defined in QEMU platform config is
   moved to common configuration in CfgData_Common.yaml
5) ApolloLake VBT ID selection is now done using configuration data.
6) Added latest VBT binary for CFL, WHL is using existing VBT.

Signed-off-by: Raghava Gudla <raghava.gudla@intel.com>
2020-09-18 17:41:12 -07:00
Guo Dong d9feb94de3 Add SetDeviceAddr() for device table update
Currently SBL library has GetDeviceAddr() to get the device
address based on device type and instance. This patch adds
SetDeviceAddr() to update a given device type and address so
that platform could update the device table dynamically.

Signed-off-by: Guo Dong <guo.dong@intel.com>
2020-09-18 17:39:27 -07:00
James Gutbub e6935143a4 Clarify SATA and USB HwPart usage
The SATA and USB HwPart usage for BootOption
config data varies from the other block device
types. This patch adds clarification to explain
the meaning of HwPart for these 2 media types
respectively.

Signed-off-by: James Gutbub <james.gutbub@intel.com>
2020-09-18 17:35:59 -07:00
jinjhuli f088f629c8 [CML] Fix travis build fail
1. Fix payload size.
2. Fix microcode clone command.

Signed-off-by: jinjhuli <jin.jhu.lim@intel.com>
2020-09-18 06:42:02 -07:00
jinjhuli 278789bc8c [CML] Initial baseline for CML platform support
- Build command
  python BuildLoader.py build cml

- Stitch command
  python Platform/CometlakeBoardPkg/Script/StitchLoader.py
  -i <EXISTING_IFWI_IMAGE>
  -o <SBL_IFWI_IMAGE>
  -s Outputs/cml/SlimBootloader.bin

Signed-off-by: jinjhuli <jin.jhu.lim@intel.com>
2020-09-15 09:18:02 -07:00
jinjhuli e5673c48a4 [CMLV] Initial baseline for CMLV platform support
- Build command
  python BuildLoader.py build cmlv

- Stitch command
  python Platform/CometlakevBoardPkg/Script/StitchLoader.py
  -i <EXISTING_IFWI_IMAGE>
  -o <SBL_IFWI_IMAGE>
  -s Outputs/cmlv/SlimBootloader.bin

Signed-off-by: jinjhuli <jin.jhu.lim@intel.com>
2020-09-15 09:17:48 -07:00
Maurice Ma 5f5cbaebaa Represent data in required format in ConfigEditor
Current ConfigEditor relies on the original input data format in YAML
to determine how to represent data in GUI. For example, if the data
value is HEX in YAML, then the data will be displayed in HEX format.
This patch switched to use the specified format type to reformat the
value string so that the display is always consistent with the required
format type.

It fixed #844.

Signed-off-by: Maurice Ma <maurice.ma@intel.com>
2020-09-15 07:33:14 -07:00
Guo Dong cfba21067c Add EndOfStage callback in S3 flow
EndOfStage callback is missing in S3 boot flow.
so just add it in case platform need do something.

Signed-off-by: Guo Dong <guo.dong@intel.com>
2020-09-10 17:24:52 -07:00
Praveen Hp 5c781d29b1 [CFL][MR1 rel] Revise up SBL minor verison to 1
update VERINFO_BUILD_DATE to actual build date instead of hardcoded
value.

Signed-off-by: Praveen Hp <praveen.hodagatta.pranesh@intel.com>
2020-09-09 21:42:55 -07:00
Praveen Hp 7314822a5b Fix klockwork scanning issue
This patch add code to check OsBootOptionList for NULL to avoid
NULL pointer dereference.

Signed-off-by: Praveen Hp <praveen.hodagatta.pranesh@intel.com>
2020-09-09 21:42:29 -07:00
Subash Lakkimsetti 6a1c024a6a Naming convention update for secureboot and IppLibs
Added EFIAPI to missing APIs

Signed-off-by: Subash Lakkimsetti <subash.lakkimsetti@intel.com>
2020-09-08 08:07:30 -07:00
Maurice Ma 340b870842 Fix GCC x64 Crypto boot issue
This patch fixed GCC x64 Crypto boot issue. The issue was related
to the calling convention. "EFIAPI" was missing for several ASM
provided functions.
It also fixed #834.

Signed-off-by: Maurice Ma <maurice.ma@intel.com>
2020-09-04 15:34:33 -07:00
Praveen Hp ddffeb3bde [CFL] Use Latest FSP and microcode release
This patch adds following chnages,

- Revise FSP github commit id to use latest FSP 7.0.74.20 and
  also rename FSP.fd to Fsp.fd to fix GCC build error.
- Add latest Microcode Release Tag.

- starting from FSP 7.0.65.50 FSP shares same stack with Bootloader
  to run FSP-M, hence adjust stack using  FSP_M_STACK_TOP variable in
  BoardConfig.py file.

Test: Build and Boot test on CFL,WHL platforms and verified successfull
      boot till yocto OS.

Signed-off-by: Praveen Hp <praveen.hodagatta.pranesh@intel.com>
2020-09-04 10:01:11 -07:00
James Gutbub 06e21fbb9b Sync IntelFsp2Pkg to support FSP 2.2
There are several definitions that have
been added to the IntelFsp2Pkg in order
to support FSP v2.2. These changes are
backwards compatible with FSP 2.0 and 2.1.

In order to support x64 build of Slim
Bootloader we have overriden the VOID*
and FSP_EVENT_HANDLER[*] to UINT32 since
FSP only supports 32-bit build/pointers
currently.

For more info please see the Intel
FSP External Architecture Specification
v2.2 at the site below:

https://www.intel.com/content/www/us/en/intelligent-systems/intel-firmware-support-package/intel-fsp-overview.html

Signed-off-by: James Gutbub <james.gutbub@intel.com>
2020-09-03 14:17:01 -07:00
Praveen 5cf67d53d1 [CFL] Fix klockwork issue
This patch adds code to check FitEntry for NULL to avoid null pointer
dereference.

Signed-off-by: Praveen <praveen.hodagatta.pranesh@intel.com>
2020-09-03 10:55:38 -07:00
Maurice Ma 68ac0bda34 Resolve build issue when verified boot is disabled
When HAVE_VERIFIED_BOOT is disabed in the latest SBL, the build will
fail because of missing key hashes. This patch resolved this issue.

Signed-off-by: Maurice Ma <maurice.ma@intel.com>
2020-09-03 09:45:44 -07:00
Maurice Ma 98b55affa1 Add payload module support in OsLoader
This patch added support to launch payload module on top of OsLoader.
Comparing with payload binary, payload module will utilize the API
services provided by OsLoader, so it will have smaller size. Other
than this, the concept is exactly same as normal payload. For payload
module, additional parameter is required to pass into the payload
module entry point.

Signed-off-by: Maurice Ma <maurice.ma@intel.com>
2020-09-02 15:42:36 -07:00
Maurice Ma bf24ae424b [QEMU] Add setup support for CFGDATA
This patch added required changes to support SBL setup for QEMU.
To enable this, set 'self.ENABLE_SBL_SETUP = 1' in BoardConfig.py.
In QEMU command line, use '-boot order=a' to trigger launching
Setup instead of normal boot flow.

Signed-off-by: Maurice Ma <maurice.ma@intel.com>
2020-09-02 15:42:36 -07:00
Maurice Ma d6a4598869 Add SBL Setup tool and feature PCD
This patch added SBL python setup script. It can run on either host
or target MicroPython environment. A new PCD PcdEnableSetup is added
to control if Setup feature should be supported by core.

Signed-off-by: Maurice Ma <maurice.ma@intel.com>
2020-09-02 15:42:36 -07:00
Maurice Ma 7779f127af Added restricted boot in boot option
This patch added restricted boot flag support. When restricted boot
flag is set, the OsLoader will only try the current boot option
selected without falling through all other boot options. Also it will
not allow to get into Shell.  This is for the usage to run some
critical applications such as bootloader Setup.

Signed-off-by: Maurice Ma <maurice.ma@intel.com>
2020-09-02 15:42:36 -07:00
Subash Lakkimsetti febbb749ff SVN for container component signing
Add svn parameter when component is signed
using command line mode.

Signed-off-by: Subash Lakkimsetti <subash.lakkimsetti@intel.com>
2020-09-01 17:59:59 -07:00
Aiden Park 02e43b4760 PayloadPkg: Build paging table to cover high MMIO region
A device in boot options can have a BAR greater than 4GB depending on PCI
64Mem/PMem resource policy.
This will allow Payload to build a paging table to cover high MMIO area.

Signed-off-by: Aiden Park <aiden.park@intel.com>
2020-09-01 17:58:58 -07:00
andreyv1978 302bb701de Always set framebuffer cache attribute
- Allocate framebuffer resource even if  ENABLE_FRAMEBUFFER_INIT=0

Signed-off-by: Andrey Vinokurtsev <avinok@gmail.com>
2020-09-01 07:41:51 -07:00
Subash Lakkimsetti 1b62d76ae7 Klocwork: Validate fit entry ptr
Check fit entry read from fit entry offset before
its dereferenced.

Signed-off-by: Subash Lakkimsetti <subash.lakkimsetti@intel.com>
2020-08-31 13:18:08 -07:00
Raghava Gudla 2ce0ceb9d3 [CFL] Add VBT file for Coffeelake
This patch added vbt.bsf and vbt.bat for coffeelake. Opensourced
vbt from github does not support DP port, newly added
vbt supports DP.

Signed-off-by: Raghava Gudla <raghava.gudla@intel.com>
2020-08-27 14:45:57 -07:00
Praveen HP f7c26922d3 [CFL] Fix Klockwork scanning issues
This patch adds necessary check to avoid NULL pointer dereference

Signed-off-by: Praveen HP <praveen.hodagatta.pranesh@intel.com>
2020-08-27 12:01:25 -07:00
Maurice Ma 99332b68dc Fix new Klocwork scanning issues
This patch fixed some new reported klocwork scanning issues.

Signed-off-by: Maurice Ma <maurice.ma@intel.com>
2020-08-25 09:57:23 -07:00
Sindhura Grandhi aeef6df940 Generate zero size dummy data in the Component Entry
This patch generate a component binary of zero size if not
already present.

Signed-off-by: Sindhura Grandhi <sindhura.grandhi@intel.com>
2020-08-24 14:41:35 -07:00
James Gutbub dadd8bdcd2 Fixed improper use of sizeof with pointer
This will resolve some issues reported by
the Klocwork scan.

Signed-off-by: James Gutbub <james.gutbub@intel.com>
2020-08-24 10:22:38 -07:00
James Gutbub 7371a65cae Add BootFlags selection to 'boot' command
The boot command currently does not allow you
to enter the BootFlags value which is needed
for some boot images.

Also fix a small issue in the FsType selection
code block.

Signed-off-by: James Gutbub <james.gutbub@intel.com>
2020-08-18 15:21:04 -07:00