Commit Graph

5 Commits

Author SHA1 Message Date
Kobe 20bc4cf163 feat: [Common] VBT header removal
Removed GopConfigLib and GopConfig header files
SBL will skip the runtime VBT update and will only consume updated VBT
SBL only pass the VBT reference to FSP without perform update
The updated VBTs for all platform boards will stored in VbtBin folder

Signed-off-by: Kobe <kok.tong.ong@intel.com>
2023-07-17 10:35:05 -07:00
Vincent Chen a3d3c59588 [ADLP] Update FSP/platform version for MR3 release
- update FSP version to IoT ADL-P MR3 (0C.01.75.10)
- update platform version to 1.3

Signed-off-by: Vincent Chen <vincent.chen@intel.com>
2023-04-12 15:46:40 -07:00
tsaikevin 801334666a
[UPX i12] Enable UPX i12 basic boot (#1857)
Add support for Up Xtreme i12 ADLP based board.
The PCIe M.2 slot CN12 on the board is able to detect NVMe SSD.
Debug output is enabled at header CN9 on the board(e.g. UART1)
Tested to boot with OS loader payload and UEFI payload.

To stitch the SlimBootloader.bin with IFWI uses StitchLoader.py script with '-p' as given below:

python Platform/AlderlakeBoardPkg/Script/StitchLoader.py -i <BIOS_IMAGE_NAME> -s Outputs/adlp/SlimBootloader.bin -o sbl_upx12_ifwi.bin -p 0xAA000104

Signed-off-by: Kevin Tsai <kevin.tsai@intel.com>
2023-04-03 18:03:21 -04:00
Vincent Chen 2e413a6843 [ADLP] Update FSP/UCODE/platform version for MR2 release
- update FSP version to IoT ADL-P MR2 (0C.01.73.10)
- update Microcode version to 423
- update platform version to 1.2

Signed-off-by: Vincent Chen <vincent.chen@intel.com>
2022-11-21 14:00:32 -07:00
Sindhura Grandhi 676c1b93a1 [ADLP] Upstream Build/Stitch/Cfgdata
This patch will let ADLP project to build and stitch images from
open source.

TEST = Smoke-test to boot to Windows/Yocto

Signed-off-by: Sindhura Grandhi <sindhura.grandhi@intel.com>
2022-07-28 15:10:54 -07:00