Commit Graph

159 Commits

Author SHA1 Message Date
Maurice Ma d8c0177fe9 Added mailbox debug port support
This patch allows to use a mailbox register (DWORD) to support debug
port. If CCA debug is connected, it is possible to access certain
SOC register through BSSB. Then this register can be used for debug
console input/output.

Signed-off-by: Maurice Ma <maurice.ma@intel.com>
2021-07-01 11:22:16 -07:00
Maurice Ma 163458e32d Add GPIO bit bang debug port library
This patch adds DebugPortLib as a platform extention lib to add new
debug port support. It also adds a generic GpioDebugPortLib to allow
GPIO bit bang to emulate UART TX pin.

Signed-off-by: Maurice Ma <maurice.ma@intel.com>
2021-07-01 11:22:16 -07:00
Jan Schlosser 8f2af41f52 [IAS] Consider signature for size only if enabled
As per specification of the IAS-Image format
https://github.com/intel/iasimage/blob/master/docs/02_mcd.md
the signature and public key are optional.

As per specification of the header format
https://github.com/intel/iasimage/blob/master/docs/02_mcd.md#image-type

The 8th bit indicate if the signature is included, while the 9th bit
indicates whether the public key is included.

While the previous solution checked if public key is enabled, it did
not check if the signature is included, but rather assumed that it
is always included.

This will lead to a miss-calculation of the `IAS_IMAGE_END` and
`IAS_IMAGE_SIZE` which on the other hand will cause `IsIasImageValid()`
to fail, which will fail the loading of unsigned IAS-Images.

Signed-off-by: Jan Schlosser <jan.schlosser@outlook.com>
2021-06-25 06:37:29 -07:00
Guo Dong be9f726139 [EHL] Remove unused feature flag for PreOS checker
FEATURE_PRE_OS_CHECKER_BOOT is not used by any core or platform code.
So just remove it.

Signed-off-by: Guo Dong <guo.dong@intel.com>
2021-06-10 13:31:16 -07:00
Vincent Chen 6275eb6eb7
Fix PCI address check in CsmeFwUpdate (#1165)
The PCI address consumed by CSME FW update library is in
EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_PCI_ADDRESS format.
- when register offset is  < 0x100, it is :    bbddffrr
- when register offset is >= 0x100, it is : rrrbbddff00
Consider the two different cases in CsmePciReadBuffer()

Signed-off-by: Vincent Chen <vincent.chen@intel.com>
2021-05-25 13:40:57 -07:00
Aiden Park 236a800284 Support ELF32/64 format payloads regardless of operation mode
This allows to load and execute ELF32 or ELF64 format payloads
regardless of Ia32 or X64 SBL operation modes.

Signed-off-by: Aiden Park <aiden.park@intel.com>
2021-05-24 09:04:14 -07:00
Maurice Ma ded75d8859 Enable SBL call into extra module in boot option
SBL allows extra module to be called before tranfering into the main
boot option. For example, RTCM module can be called for boot option
with TCC feature support. This patch enabled this support.  Since the
extra module might have different ARCH mode from current SBL mode,
thunk will be provided if mismatching is detected.

Signed-off-by: Maurice Ma <maurice.ma@intel.com>
2021-04-13 14:05:48 -07:00
Maurice Ma fda951e10a Add image ARCH type into SBL version info
SBL can support IA32 and X64 build. But this info is not indicated
in the SBL version info. This patch added one bit to indicate the
SBL is IA32 or X64.

Signed-off-by: Maurice Ma <maurice.ma@intel.com>
2021-04-11 20:32:21 -07:00
Maurice Ma 94d22382bd [APL/CFL] Enable SMM rebase for mon UEFI payload
For non UEFI payload, SBL will install dummy SMI handler for
security concern. For UEFI payload, SMM rebasing is expected
to be done itself. This patch enabled this feature for APL and
CFL platform.

Signed-off-by: Maurice Ma <maurice.ma@intel.com>
2021-04-10 15:28:07 -07:00
Maurice Ma 13733b12bf Add thunk support from 32bit to 64bit
This patch added thunk support from 32bit to 64bit. It allows SBL
to call 64bit API entry from 32 bit compatible mode. It is useful
when the payload mode is different from SBL mode.

Signed-off-by: Maurice Ma <maurice.ma@intel.com>
2021-04-04 10:59:46 -07:00
Subash Lakkimsetti c05a04a5ce Fix comments in for DoHashVerify and DoRsaVerify apis
Updated param and error code descriptions

Signed-off-by: Subash Lakkimsetti <subash.lakkimsetti@intel.com>
2021-03-30 21:40:29 -07:00
Subash Lakkimsetti aa36ae70d1
Oem Key revocation feature support (#1043)
EHL, TGL supports multiple OEM keys and their revocation
by CSE. This patch supports,
- CMDI interface to perform key revocation using
  OEMKEYREVOCATION string in cmd file.
- EHL HECI APIs for OemkeyRevoke and to get key status
- FW componets are sorted as per required order.
  CSME and BIOS should be signed with new keys and
  both components would go together with capsule update.

Signed-off-by: Subash Lakkimsetti <subash.lakkimsetti@intel.com>
2021-03-08 11:04:44 -08:00
Subash Lakkimsetti 84c8a3ffe2 Update CsmePciReadBuffer callback prototype params
CsmePciReadBuffer function prototype is alligned as
per the CSME fwupdate lib. It fixes issue with
CSME capsule fw update.

Signed-off-by: Subash Lakkimsetti <subash.lakkimsetti@intel.com>
2021-02-24 21:15:03 -08:00
Maurice Ma 04b162e75e Add CPU X2APIC support
This patch added X2APIC support. It is to enable the case when
APIC ID is greater than 255. This patch only handle core wakeup
portion. Platform still needs to handle ACPI related changes for
X2APIC.

X2APIC lib is backward compatible with XAPIC lib. So there is no
need to use XAPIC lib anymore.

Signed-off-by: Maurice Ma <maurice.ma@intel.com>
2021-02-12 17:20:57 -08:00
Guo Dong 234bf55561
Fix the MP hang issue (#1013)
The ApDataPtr->CProcedure was wrongly updated in previous patch.
This patch fixed it and CPU task name from CProcedure to TaskFunc
to avoid confusion.

Signed-off-by: Guo Dong <guo.dong@intel.com>
2021-02-10 09:29:54 -08:00
Guo Dong 45be2a8daa Build MP CPU TASK info hob
With this hob, user could run a task from AP in Osloader.

Signed-off-by: Guo Dong <guo.dong@intel.com>
2021-02-08 09:31:08 -07:00
Raghava Gudla ca738786cc
Fix firmware update failure during sbl svn check (#999)
This patch fixed a failure in firmware update that
occur during SBL version check. Current code assume
that the SBL layout does not change between the existing
firmware and the capsule, when the layout change, stage1A
address change and this is causing error while obtaining
the firmware version.

Code is modified to use the last 4 bytes of the SBL region
which contain Stage1A FV address and this is used to obtain
the version information.

Signed-off-by: Raghava <raghava.gudla@intel.com>
2021-02-05 09:01:26 -08:00
Talamudupula e6d73eb55b [TGL] Use common GpioLib
Point TGL project to use common GpioLib and fix build errors.
GpioPlatformLib instance for TGL platform is also provided
as a reference for other platforms. Also remove TGL specific
Gpio Library related files.

Usage:

    To configure Gpio pins provided by GPIO CFG DATA:
        ConfigureGpio(Gpio_Cfg_Data_Tag, 0, NULL);

    To configure Gpio pins provided by GPIO_INIT_CONFIG array:
        ConfigureGpio(0, Num_entries, Ptr_to_Array);

Signed-off-by: Talamudupula <stalamudupula@gmail.com>
2021-02-01 19:24:26 -07:00
Raghava Gudla c9be70efd2
Fix failure during csme firmware update (#982)
This patch fixed a failure occured during CSME firmware
update. CSME firmware update library expects PCI read buffer
with a specific format, there is mismatch with input and output
parameter with the current code. Added a wrapper function
with the expected format to fix the failure.

Signed-off-by: Raghava Gudla <raghava.gudla@intel.com>
2021-01-25 15:46:54 -08:00
Guo Dong 78cce60ce8 Enhance PreOS support
SBL support to load PreOS and normal OS in a single boot option.
This patch tries to standardize the PreOS support.
The PreOS could be TrustyOS, PreOsChecker or others.
As long as PreOS flag is set in boot option, SBL will load and
boot PreOS before normal OS. If the preOS has specific requirement,
it could be addressed using PreOS image type.

Signed-off-by: Guo Dong <guo.dong@intel.com>
2021-01-15 21:29:43 -07:00
Maurice Ma a85f327ad8 Enhance BGRT BMP support for logo display
BGRT can be used by bootloader to pass logo to OS. But BGRT can
only support 24bit or 32bit BMP format. If the bootloader uses
other bit format or indexed color format, the image has to be
converted before passing it to BGRT. This patch added support
to convert other BMP image format into 32bit format required by
BGRT.

This has been tested with Windows on Leafhill board. The SBL
logo was dispalyed properly while booting Windows.

Signed-off-by: Maurice Ma <maurice.ma@intel.com>
2021-01-14 09:52:36 -08:00
Aiden Park eabaac12ad Add PCI Resource Allocation Table
This introduces a new PCD 'PcdPciResAllocTableBase' to allow a platform
to provide its specific PCI resource allocation pool at runtime.
PCI Enumerator will allocate required resources in the range.
If the PCD is not provided, a default range will be used.

Signed-off-by: Aiden Park <aiden.park@intel.com>
2020-12-15 14:05:25 -08:00
Maurice Ma 6117ebaa7c Enable ACPI BGRT table support
This patch enabled ACPI BGRT support. It is used to pass splash
display information from bootloader to payload and OS.

Signed-off-by: Maurice Ma <maurice.ma@intel.com>
2020-12-02 12:40:18 -08:00
Maurice Ma c6feaaf3e3
Add ACPI RSDP to Linux BOOT_PARAMS (#905)
For UEFI Linux boot, a new parameter was added into BOOT_PARAMS.
This patch added this parameter support so that ACPI base can
be passed directly to kernel.

Signed-off-by: Maurice Ma <maurice.ma@intel.com>
2020-11-22 21:08:19 -08:00
Maurice Ma 1002d880a2 Enable mixed payload mode calling
Since SBL could be built into either x86 or x64 mode, and the payload
can also be x86 or x64 mode. When mixed modes are used, it is required
to switch to proper mode first before calling into payload entrypoint.
This patch added this check to switch to required mode before calling
into payload entry point.

Signed-off-by: Maurice Ma <maurice.ma@intel.com>
2020-10-12 13:01:07 -07:00
Raghava Gudla 3ec4e03a74 Expand HECI service to add more API's
This patch expanded HECI service to include send, receive and
reset interface functions. This helps in making firmwareupdatelib.c
and PSDlib common across platforms.

Signed-off-by: Raghava Gudla <raghava.gudla@intel.com>
2020-10-08 15:40:00 -07:00
Maurice Ma dd8fe22046 Add MultiBoot support for X64 build
During X64 enabling, there was a pending task to enable 32bit
MultiBoot support. It is not implemented.  This patch added the
support to allow X64 SBL to boot a 32bit MB image through thunking.
As part of this patch, the ThunkLib is separated from the FspApiLib
so that it can be shared by other component.

Signed-off-by: Maurice Ma <maurice.ma@intel.com>
2020-10-07 14:20:50 -07:00
Guo Dong d9feb94de3 Add SetDeviceAddr() for device table update
Currently SBL library has GetDeviceAddr() to get the device
address based on device type and instance. This patch adds
SetDeviceAddr() to update a given device type and address so
that platform could update the device table dynamically.

Signed-off-by: Guo Dong <guo.dong@intel.com>
2020-09-18 17:39:27 -07:00
Subash Lakkimsetti 6a1c024a6a Naming convention update for secureboot and IppLibs
Added EFIAPI to missing APIs

Signed-off-by: Subash Lakkimsetti <subash.lakkimsetti@intel.com>
2020-09-08 08:07:30 -07:00
Maurice Ma d6a4598869 Add SBL Setup tool and feature PCD
This patch added SBL python setup script. It can run on either host
or target MicroPython environment. A new PCD PcdEnableSetup is added
to control if Setup feature should be supported by core.

Signed-off-by: Maurice Ma <maurice.ma@intel.com>
2020-09-02 15:42:36 -07:00
Maurice Ma 7779f127af Added restricted boot in boot option
This patch added restricted boot flag support. When restricted boot
flag is set, the OsLoader will only try the current boot option
selected without falling through all other boot options. Also it will
not allow to get into Shell.  This is for the usage to run some
critical applications such as bootloader Setup.

Signed-off-by: Maurice Ma <maurice.ma@intel.com>
2020-09-02 15:42:36 -07:00
Aiden Park 02e43b4760 PayloadPkg: Build paging table to cover high MMIO region
A device in boot options can have a BAR greater than 4GB depending on PCI
64Mem/PMem resource policy.
This will allow Payload to build a paging table to cover high MMIO area.

Signed-off-by: Aiden Park <aiden.park@intel.com>
2020-09-01 17:58:58 -07:00
Maurice Ma 0000d110a2 Add interface to draw framebuffer from text buffer
This patch added new DrawFrameBuffer interface. It will draw the
framebuffer from a VGA like text buffer. Payload can use this
to sync its own text buffer onto framebuffer screen. It aslo added
extend ASCII char support so that some table char can be displayed.

Signed-off-by: Maurice Ma <maurice.ma@intel.com>
2020-08-12 18:45:10 -07:00
Maurice Ma 8aeed6fd9a Add functions to build CFGDATA from database
This patch added new function to build a full set of the CFGDATA set
from the memory for current platform. It is useful for exporting
current platform CFGDATA for further processing.

Signed-off-by: Maurice Ma <maurice.ma@intel.com>
2020-08-12 12:33:45 -07:00
Maurice Ma 6eac355a33 Fix Linux Framebuffer
Linux framebuffer screen_info has been extended to support 64bit
address. This patch added extra fields and set the upper 32 bit
for the framebuffer base.

Signed-off-by: Maurice Ma <maurice.ma@intel.com>
2020-08-10 10:38:41 -07:00
Maurice Ma 091ba856c6 Move GetHashToExtend to SecureBootLib
This patch moved GetHashToExtend function from BootloaderCommonLib
to SecureBootLib. It is a better place to contain this interface.

Signed-off-by: Maurice Ma <maurice.ma@intel.com>
2020-08-06 12:08:30 -07:00
Subash Lakkimsetti 76eec9a127 Configdata firmware update svn check
Add support for security version check for
config data blob update. SVN is checked
for redundant region which would be updated.

Fixed python errors in CfgDataTool and
GenCapsuleFirmware.

Signed-off-by: Subash Lakkimsetti <subash.lakkimsetti@intel.com>
2020-08-05 13:49:45 -07:00
Subash Lakkimsetti c8bda59231 Capsule update command for SVN commit
Capsule Command support added for anti rollback
security version number. User can create command
in text file and create capsule with CMDI mode.

{ARBSVNCOMMIT}

Platform APIs would be invoked to do SVN
commit operations by useing HECI interfaces.

Signed-off-by: Subash Lakkimsetti <subash.lakkimsetti@intel.com>
2020-07-10 07:47:21 -07:00
Subash Lakkimsetti ad839a3507 Container capsule update svn check
Add support for security version check for
container and its components with ones available
in flash for capsule updates.

Signed-off-by: Subash Lakkimsetti <subash.lakkimsetti@intel.com>
2020-07-01 20:02:41 -07:00
Subash Lakkimsetti fb98b7902f Security version number to container
Add svn field to container generation. SVN need
to be verified while doing container capsule
update. svn is added as end parameter to layout.

Signed-off-by: Subash Lakkimsetti <subash.lakkimsetti@intel.com>
2020-06-24 12:01:59 -07:00
Maurice Ma 0311566858 Use container format for key hash store
This patch converted key hash store in SBL image into container
format. In this way unified data structure can be used to
simplify code.

Signed-off-by: Maurice Ma <maurice.ma@intel.com>
2020-06-16 11:20:12 -07:00
Maurice Ma fc6aa78708 Add OEM container verification support
Current SBL supports container header verification. If the container
signature is BOOT, it will use HASH_USAGE_PUBKEY_OS. Otherwise, it
will use HASH_USAGE_PUBKEY_CONTAINER_DEF. This patch added OEM signed
container support. If a container signature between OEM0 to OEM7 is
found, it will be verified use HASH_USAGE_PUBKEY_OEM(x) where x is 0
to 7. To add an OEM public key hash, it can be done by updating
pub_key_list in GetKeyHashList() in file BoardConfig.py.

Signed-off-by: Maurice Ma <maurice.ma@intel.com>
2020-05-22 12:19:50 -07:00
Subash Lakkimsetti 1ac8e390c4 Firmware update in command mode
This patch adds generic functionality to
process Flash descriptor lock. It follows
Capsule Firmware update flow and interface
is updated. Command (CMDI) interface is added
to GenCapsuleFirmware which takes file with
command as input.

Sample Command format in text file input,
{FLASHDESCLOCK}
{Command2}
{Command3}

Firmware update lib handler parses high level commands
Specific command process and functionlity would be
performed by platform specific libraries.

Signed-off-by: Subash Lakkimsetti <subash.lakkimsetti@intel.com>
2020-05-20 09:38:47 -07:00
Subash Lakkimsetti 47a15937a1 String function Support library
Add string functionality in Osloader to a
common library

Signed-off-by: Subash Lakkimsetti <subash.lakkimsetti@intel.com>
2020-05-13 08:34:20 -07:00
Subash Lakkimsetti 5804d9a18a Measure firmware debugger launch
Platform debug mode is extended to PCR[7]
as part of secure boot policy. Updated bit setting
to LoaderPlatformInfo for payloads to consume.
Debug mode is checked in payload.

ArchitecturalMsr.h ported fom EDK2 repo.

Signed-off-by: Subash Lakkimsetti <subash.lakkimsetti@intel.com>
2020-05-05 15:07:15 -07:00
Aiden Park e99762353a
Introduce CONSOLE_PRINT macro (#701)
This will allow necessary messages to be printed to consoles.

These macros will redirect debug message to consoles.
  CONSOLE_PRINT
  CONSOLE_PRINT_UNICODE

These conditional macros will redirect debug message to consoles or
DEBUG(). The PrintLevel is valid only when redirected to DEBUG().
  CONSOLE_PRINT_CONDITION
  CONSOLE_PRINT_UNICODE_CONDITION

Signed-off-by: Aiden Park <aiden.park@intel.com>
2020-05-04 14:53:08 -07:00
Guo Dong 82eb72c9a7
Add MtrrLib with a MTRR display function (#693)
To help debug boot performance, add a MTRR print function.
This function could be invoked multiple times with different
string to know where this MTRR data is printed.

Signed-off-by: Guo Dong <guo.dong@intel.com>
2020-04-30 22:08:05 -07:00
stalamudupula ee26b02df5
Support paging for Above4Gb addresses (#692)
This patch enhances MapMemoryRegion subroutine to
add PDP entries for mapping addresses > 4GiB.
Only 1:1 mapping is provided for Above4Gb addresses.
And linear addresses are mapped to 1GiB pages.

Signed-off-by: Sai Talamudupula <sai.kiran.talamudupula@intel.com>
2020-04-30 22:05:54 -07:00
Aiden Park 57bea9118d
Enhance debug log buffer as ring buffer (#699)
This will allow debug log buffer to record logs in ring buffer
if the buffer is full.

Signed-off-by: Aiden Park <aiden.park@intel.com>
2020-04-30 11:56:39 -07:00
Maurice Ma 86566d4196 Move container initialization earlier
Current container library cannot be used before memory is initialized
because the structure will only be initialized after memory. This
patch moved the initialization into Stage1A so that the library can be
used much earlier. The containers registered before memory will be
migrated into memory automatically post memory initialization. In this
way it avoids duplicated header authentication.

Signed-off-by: Maurice Ma <maurice.ma@intel.com>
2020-04-24 08:06:05 -07:00