Commit Graph

6 Commits

Author SHA1 Message Date
Sai Talamudupula 14c3862005 Relocate SMM bases on S3 resume path
Smm bases for all the procs need to be relocated on the
S3 resume path (as payload is not run) for Windows boot.

Signed-off-by: Sai Talamudupula <sai.kiran.talamudupula@intel.com>
2019-02-26 11:23:29 -07:00
Maurice Ma dd3c729361 Rename KeyStore to HashStore to reduce confusion
Current code refers hash store as "key store". It is confusing
since there is no key stored in the image at all.  Instead, the
public key hash is stored.  The patch renames the KeyStore
to HashStore.

Signed-off-by: Maurice Ma <maurice.ma@intel.com>
2018-11-09 16:49:37 -08:00
Maurice Ma f768137b66 Add basic SMM rebasing support
SBL has no intention to support SMI. However, on many hardware
platforms, there is no reliable way to prevent SMI from generating
through SMI IPI.  In case it occurs, CPU will jump to the default
0x38000 location for execution, which exposes huge security issues.

The recommended solution is to do basic SMM base relocation and put
a dummy SMI handler (RSM) there for platform does not support SMI
disabling. In this way, the SMI will be ignored, and it also closes
the security concerns. This patch implemented basic SMM relocation.

It is under the control of a new PCD PcdSmmRebaseEnabled. By default,
it is disabled.  To enable it, please set ENABLE_SMM_REBASE in
BoardConfig.py. As part of it, platform library needs to set
PcdSmramTsegBase and PcdSmramTsegSize properly in PreSiliconInit board
hook. Please take APL platform for reference.

Signed-off-by: Maurice Ma <maurice.ma@intel.com>
2018-11-01 20:00:13 -07:00
Maurice Ma 03385ca8a7 Enable graphics framebuffer as WriteCombining
On APL platform, all PCI MMIO range is set to UC in current
implementation. It includes graphics framebuffer MMIO. It
caused the system performance issue due to large mount of
framebuffer write access. This patch set framebuffer as
WC (WriteCombining) per recommendation to enhance system
performance.

Signed-off-by: Maurice Ma <maurice.ma@intel.com>
2018-10-26 11:03:09 -07:00
Aiden Park b6697f12a8
Enable DebugAgentLib to support source level debug over serial (#18)
* Enable DebugAgentLib to support source level debug over serial

By default, source level debug is NOT enabled. ENABLE_SOURCE_DEBUG
needs to be set to 1 in BoardConfig.py of each Platforms.
- self.ENABLE_SOURCE_DEBUG  = 1

As an initial drop, there are some limitations on APL platform.
- Stage1A does not include DebugAgentLib due to Stage1A size
  limitation(32KB). Further optimization is required.
- DebugAgentLib supports ONLY POSTMEM debugging on APL currently.

Refer to EDKII Debugging:
- https://github.com/tianocore/tianocore.github.io/wiki/EDK-II-Debugging
- https://github.com/tianocore/tianocore.github.io/wiki/SourceLevelDebugPkg

Change-Id: Ia28c5470bc5755768f2b380cc1dabbcb8ee60f0d
Signed-off-by: Aiden Park <aiden.park@intel.com>

* Additional changes for DebugAgent

- Adjust stage size depending on ENABLE_SOURCE_DEBUG Pcd value
- Add PeCoffFindAndReportImageInfo
- Fix debugger hang at Shell

Change-Id: I11b41e5ad610fcb2999e9d43e5dd8f8899e8265a
Signed-off-by: Aiden Park <aiden.park@intel.com>

* Move PeCoffFindAndReportImageInfo() from LitePeCoffLib to DebugAgentLib

Change-Id: I2c4ab4f9561dfd0536da1820048f0e5f2660e2ab
Signed-off-by: Aiden Park <aiden.park@intel.com>
2018-10-15 10:45:23 -07:00
Maurice Ma c6999f497a Initial check-in for Slim Bootloader source 2018-09-13 16:11:07 -07:00