In the Ext23Lib support for symbolic links was recently enabled
but there was a limitation imposed to use the CFG data boot
option filepath limit of 16 bytes which does not need to be also
be imposed on symbolic link paths. This will allow symbolic link
paths to be up to 260 characters long.
Signed-off-by: James Gutbub <james.gutbub@intel.com>
1. Copy the FIVR settings in CfgData for user to configure
the desire value.
2. Removed fsp upd PmSupport for Fusa sku
Signed-off-by: Ong Kok Tong <kok.tong.ong@intel.com>
The build system is using 'git', it doesn't require the latest git.
This will show 'git' recommend version if not met,
and will address issue#1136.
Signed-off-by: Aiden Park <aiden.park@intel.com>
This patch enhanced OsLoader to support ELF image boot on top of
PE, FV, Multiboot and Kernel. As a result, a new image flag
LOADED_IMAGE_ELF is added to indicate ELF image type.
Verified SBL can boot uboot ELF image (non-Multiboot) on QEMU.
Signed-off-by: Maurice Ma <maurice.ma@intel.com>
This CL is a follow up on these CL to enable SMRR programming:
https://github.com/slimbootloader/slimbootloader/pull/1106https://github.com/slimbootloader/slimbootloader/pull/1114
In normal UEFI payload case, the UEFI will handle SMM rebasing.
If SMM rebasing is handled by SBL, SBL will put a dummy SMI handler
at the new SMBASE to prevent SMM hang. Beyond SMM rebasing, it
is also required to program SMRR registers.
This patch added this support for EHL by setting ENABLE_SMM_REBASE
flag to auto mode.
Signed-off-by: Lean Sheng Tan <lean.sheng.tan@intel.com>
S0ix failed to enter when pcie card is attaching.
The _OFF method of RP01 power resource didnt get
called upon entering s0ix.
Workaround by performing the action in _OFF and _ON
method in low power idle entering callback.
Signed-off-by: Ong Kok Tong <kok.tong.ong@intel.com>
This will check the minimum required toolchain versions
before starting build process.
If any of these toolchains does not meet the required version,
the build process will stop immediately.
Here are the initial minimum toolchain versions.
- python : 3.6.0
- nasm : 2.12.02
- iasl : 20160422
- openssl: 1.1.0g
- git : 2.20.0
- vs : 2015
- gcc : 7.3
- clang : 9.0.0
Signed-off-by: Aiden Park <aiden.park@intel.com>
This is an regression introduced with platform asl updates.
SMIE is checked in Tpm asl before SMI is triggered.
Removal of this definition causes physical presence
usecases failure.
TEST=Verified TPM clear usecases with windows boots
Signed-off-by: Subash Lakkimsetti <subash.lakkimsetti@intel.com>
This patch restructed MP init library so that more code can be
common between 32bit and 64bit. It is much easier to maintain the
code after the restructure.
Signed-off-by: Maurice Ma <maurice.ma@intel.com>
This patch enables QEMU SMM TSEG programming in FSP. And it also
enables SBL QEMU SMM rebasing. It can be used to test many SMM
related flow.
Signed-off-by: Maurice Ma <maurice.ma@intel.com>
QEMU currently set PayloadId in Post PCI enumeration. To be in
sync with other platform, this patch moves it to PreSiliconInit
hook point.
Signed-off-by: Maurice Ma <maurice.ma@intel.com>
With recent code change of disabling all PCI bus master
by default, NVMe may not work in some platform (e.g., Qemu).
This patch set/clear bus master during NVMe init/deinit.
Signed-off-by: Stanley Chang <stanley.chang@intel.com>
EHL CFGDATA has missing options for Combo type configuration. And
it will cause ConfigEditor exception. This patch added the missing
options. And it also fixed typos.
It fixed issue #1122.
Signed-off-by: Maurice Ma <maurice.ma@intel.com>
When S3 resume fails for some reason, the power button status will
be not be cleared on next boot. It might trigger shutdown event in
payload. This patch will clear power button status bit on normal
boot flow so that system can still boot properly.
Signed-off-by: Maurice Ma <maurice.ma@intel.com>
Some of the boot option file paths used when
booting with OS Loader payload are failing
because the Ext23Lib does not support symbolic
soft links (e.g. ln -s <file> <link>). This
patch adds support for loading the soft link
succesfully.
Signed-off-by: James Gutbub <james.gutbub@intel.com>
For appending Save/Restore structs in TSEG area,
bootloader should reserve space for TotalSize and
for certain structs, only header info should be
actually populated. Rest should be all Zeros.
Signed-off-by: Talamudupula <stalamudupula@gmail.com>
Need to set an initial value for SmmRebaseMode in
order to resolve a klocwork issue regarding
unitialized usage.
Signed-off-by: James Gutbub <james.gutbub@intel.com>
With latest core code change, it would boot hang.
So need set SMM related PCD early and update platform
to enable SMM rebase.
Signed-off-by: Guo Dong <guo.dong@intel.com>
Current SBL SMM rebasing check is only performed when PcdSmmRebaseMode
is enabled. It does not cover the case to boot UEFI payload. This patch
enhaced the check to cover UEFI payload S3 path as well.
Signed-off-by: Maurice Ma <maurice.ma@intel.com>
SBL allows extra module to be called before tranfering into the main
boot option. For example, RTCM module can be called for boot option
with TCC feature support. This patch enabled this support. Since the
extra module might have different ARCH mode from current SBL mode,
thunk will be provided if mismatching is detected.
Signed-off-by: Maurice Ma <maurice.ma@intel.com>
When SMRR is enabled too early, it blocked TSEG access in Stage2.
And it caused S3 related issues. This patch delays the SMRR enabling
to be after PrePayloadLoading BoardInit().
Signed-off-by: Maurice Ma <maurice.ma@intel.com>
SBL can support IA32 and X64 build. But this info is not indicated
in the SBL version info. This patch added one bit to indicate the
SBL is IA32 or X64.
Signed-off-by: Maurice Ma <maurice.ma@intel.com>
For non UEFI payload, SBL will install dummy SMI handler for
security concern. For UEFI payload, SMM rebasing is expected
to be done itself. This patch enabled this feature for APL and
CFL platform.
Signed-off-by: Maurice Ma <maurice.ma@intel.com>
In normal UEFI payload case, the UEFI will handle SMM rebasing.
If SMM rebasing is handled by SBL, SBL will put a dummy SMI handler
at the new SMBASE to prevent SMM hang. Beyond SMM rebasing, it
is also required to program SMRR registers. This patch added this
support for core code. It also added TSEG PCD init for CFL.
Signed-off-by: Maurice Ma <maurice.ma@intel.com>
Update Boot Flags to list PreOs and Extra image.
Hide other options when preOS or Extra Image is selected.
Signed-off-by: Guo Dong <guo.dong@intel.com>
Updated ACPI Tables, NVS data and FSP UPDs for S0ix support
S0ix is working on yocto through USB boot and windows through CPU M.2 NVME
Signed-off-by: jinjhuli <jin.jhu.lim@intel.com>
Rework flash map to prepare extra empty size for FW update and
future growth.
Here are related changes:
1. Expand the SBL size to 13MB
2. Hardcode and increase Redundant size to 0x360000
3. Allocate the remaining space for Non-Redundant space
Signed-off-by: leanshen <lean.sheng.tan@intel.com>
DebugConsent related UPD configs should be able to updated via
YAML configs, hence restore to the intended design which allows
user to update these configs via YAML/SBL config editor tool.
This CL also add debug print for these configs.
When DebugConsent is set to manual, DebugInterfaceEnable should
be set to 0 to disable CPU run control.
Part 2 will bring changes to YAML to properly reflect the right
setup combo for Debug Settings and a separate Debug CfgData.
In the end, DebugConsent configs are pretty standard across most
of platforms and should be moved to common codes.
Signed-off-by: leanshen <lean.sheng.tan@intel.com>
Update TCC config data strings to use the formal names.
And change the default value to make TCC disabled by default.
Signed-off-by: Guo Dong <guo.dong@intel.com>
This will disable all PCI bus master by default, and enable it only if
- the original bus master was enabled before PCI enumeration
- Or the device is PCI Bridge
Signed-off-by: Aiden Park <aiden.park@intel.com>
This patch added argument support for qemu_test.py so that a
specified test case can be launched separately. Wilecard chars
are supported for the test case name.
Signed-off-by: Maurice Ma <maurice.ma@intel.com>
On some build environment, NASM will fail to compile Thrun32To64.nasm.
It is because of "BITS 64" usage in WIN32. This patch removed the BITS
64 usage and used opcode prefix instead to resolve this issue.
Signed-off-by: Maurice Ma <maurice.ma@intel.com>
This patch added thunk support from 32bit to 64bit. It allows SBL
to call 64bit API entry from 32 bit compatible mode. It is useful
when the payload mode is different from SBL mode.
Signed-off-by: Maurice Ma <maurice.ma@intel.com>
Current SBL release debug output has more than what is expected.
This patch reset some of the debug message to proper level to limit
debug message for release build.
Signed-off-by: Maurice Ma <maurice.ma@intel.com>
SBL EHL softstrap override WA due to bug in FIT 2252
1. Offset 0xc1c-> Bit 0x1 to value 0x1
(pmc_smip/RSVD_2A_DIS_STRAP_PSEGBe0)
2. Offset 0xc1c-> Bit 0x2 to value 0x1
(pmc_smip/RSVD_2A_DIS_STRAP_PSEGBe1)
3. Offset 0x1d5-> Bit 0x4 to value 0x1
(MGBE/mgbe_soc_specific)
4. Synced other FIT values
Signed-off-by: Ong Kok Tong <kok.tong.ong@intel.com>
This patch will enable CLANG toolchain build on Linux and Windows.
Currently CLANG toolchain build still needs Visual Studio to provide
nmake utility in Windows.
To build with CLANG, please add build option "-t clang". It assume
CLANG is installed at default path. It has been tested with SBL
QEMU x86 build.
Signed-off-by: Maurice Ma <maurice.ma@intel.com>
When PreOS is configured from OS boot option data, the common function
FillBootOptionListFromCfgData () need update it to correct boot option
image LoadImageTypePreOs. Similarly when extra image is specified, need
update to extra image.
Update ImageType value and fix an image load issue for RTCM.
Signed-off-by: Guo Dong <guo.dong@intel.com>
James Gutbub