[CFL] Fix the PMI_STS clear logic (#340)
Current logic enables all EN bits in PMI_EN in order to clear single PWRBTN_EN bit. This should not happen. Corrected the logic so that only PWRBTN_EN is cleared and the other EN bits are untouched. Signed-off-by: Sai Talamudupula <sai.kiran.talamudupula@intel.com>
This commit is contained in:
parent
cb853f876b
commit
fbd45e70b0
|
@ -462,7 +462,7 @@ GetPlatformPowerState (
|
|||
/// Clear Wake Status
|
||||
/// Also clear the PWRBTN_EN, it causes SMI# otherwise (SCI_EN is 0)
|
||||
///
|
||||
IoWrite32 (ACPI_BASE_ADDRESS + R_ACPI_IO_PM1_STS, ((UINT32)~B_ACPI_IO_PM1_EN_PWRBTN_EN & R_ACPI_IO_PM1_EN_MASK) | B_ACPI_IO_PM1_STS_WAK );
|
||||
IoAndThenOr32 (ACPI_BASE_ADDRESS + R_ACPI_IO_PM1_STS, (UINT32)~B_ACPI_IO_PM1_EN_PWRBTN_EN, B_ACPI_IO_PM1_STS_WAK);
|
||||
|
||||
if ((MmioRead8 (PCH_PWRM_BASE_ADDRESS + R_PMC_PWRM_GEN_PMCON_B) & B_PMC_PWRM_GEN_PMCON_B_RTC_PWR_STS) != 0) {
|
||||
BootMode = BOOT_WITH_FULL_CONFIGURATION;
|
||||
|
|
Loading…
Reference in New Issue