[TGL] Disable s0ix on TGLU RVP
s0ix feature enabling flag also turn off some FSP configs so that default SBL image can't detect the onboard Lan and type c devices. Signed-off-by: Randy Lin <randy.lin@intel.com>
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#
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# Platform Configuration Delta File.
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#
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# Copyright (c) 2019 - 2021, Intel Corporation. All rights reserved.<BR>
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# Copyright (c) 2019 - 2022, Intel Corporation. All rights reserved.<BR>
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# SPDX-License-Identifier: BSD-2-Clause-Patent
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#
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##
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PLATFORMID_CFG_DATA.PlatformId | 0x0001
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PLAT_NAME_CFG_DATA.PlatformName | 'TGLU_DDR'
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# Enable S0ix by default
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FEATURES_CFG_DATA.Features.S0ix | 0x1
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# Disable S0ix by default
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FEATURES_CFG_DATA.Features.S0ix | 0x0
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MEMORY_CFG_DATA.DqsMapCpu2DramMc0Ch1 | {0, 1}
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MEMORY_CFG_DATA.DqsMapCpu2DramMc0Ch3 | {0, 1}
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#
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# Platform Configuration Delta File.
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#
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# Copyright (c) 2019 - 2021, Intel Corporation. All rights reserved.<BR>
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# Copyright (c) 2019 - 2022, Intel Corporation. All rights reserved.<BR>
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# SPDX-License-Identifier: BSD-2-Clause-Patent
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#
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##
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PLATFORMID_CFG_DATA.PlatformId | 0x0003
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PLAT_NAME_CFG_DATA.PlatformName | 'TGLU_LP4'
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# Enable S0ix by default
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FEATURES_CFG_DATA.Features.S0ix | 0x1
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# Disable S0ix by default
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FEATURES_CFG_DATA.Features.S0ix | 0x0
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MEMORY_CFG_DATA.SpdAddressTable | {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}
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MEMORY_CFG_DATA.SpdDataSel000 | 1
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