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Add TCG2 physical presence ACPI to CommonBoardPkg 

TpmSsdt.asl is common for supported platforms
SMIE for SMI control access is defined in Platform DSDT
for CFL and APL.

Signed-off-by: Subash Lakkimsetti <subashx.lakkimsetti@intel.com>
This commit is contained in:
Subash Lakkimsetti 2019-08-26 11:41:14 -07:00 committed by Maurice Ma
parent 1e33df6aaa
commit c3c754a10d
5 changed files with 286 additions and 390 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

12
Platform/ApollolakeBoardPkg/AcpiTables/Dsdt/Platform.asl
View File

@ -5,6 +5,9 @@
**/
#include "PlatformBase.h"
#include "ScRegs/RegsPmc.h"
#define NW_GPIO_116 0x00C40728 //GP_SSP_1_RXD
// Define the following External variables to prevent a WARNING when
@ -29,6 +32,15 @@ Field (SPRT, ByteAcc, Lock, Preserve) {
SSMP, 8
}
//
// Operational region for ACPI Control (SMI_EN) access
//
OperationRegion (SMIN, SystemIO, (ACPI_BASE_ADDRESS + R_SMI_EN), 0x4)
Field (SMIN, AnyAcc, NoLock, Preserve)
{
SMIE, 32
}
// The _PIC Control Method is optional for ACPI design. It allows the
// OS to inform the ASL code which interrupt controller is being used,
// the 8259 or APIC. The reference code in this document will address

2
Platform/CoffeelakeBoardPkg/AcpiTables/AcpiTables.inf
View File

@ -35,7 +35,7 @@
Fwst/Fwst.aslc
Platform/CommonBoardPkg/AcpiTables/Tpm/Tpm2.aslc
Platform/CommonBoardPkg/AcpiTables/Fpdt/Fpdt.aslc
Ssdt/TpmSsdt.asl
Platform/CommonBoardPkg/AcpiTables/Tpm/TpmSsdt.asl
Ssdt/Thermal.asl
CpuSsdt/Cpu0Cst.asl
CpuSsdt/Cpu0Ist.asl

12
Platform/CoffeelakeBoardPkg/AcpiTables/Dsdt/Platform.asl
View File

@ -8,7 +8,8 @@
#include "GpioPinsCnlH.h"
#include "GpioPinsCnlLp.h"
#include "PlatformBase.h"
#include "Register/PchRegsPmc.h"
#define TRAP_TYPE_DTS 0x02
#define TRAP_TYPE_BGD 0x04 // BIOS Guard
@ -189,6 +190,15 @@ Field (SPRT, ByteAcc, Lock, Preserve) {
SSMP, 8
}
//
// Operational region for ACPI Control (SMI_EN) access
//
OperationRegion (SMIN, SystemIO, (ACPI_BASE_ADDRESS + R_ACPI_IO_SMI_EN), 0x4)
Field (SMIN, AnyAcc, NoLock, Preserve)
{
SMIE, 32
}
// The _PIC Control Method is optional for ACPI design. It allows the
// OS to inform the ASL code which interrupt controller is being used,
// the 8259 or APIC. The reference code in this document will address

376
Platform/CoffeelakeBoardPkg/AcpiTables/Ssdt/TpmSsdt.asl
View File

@ -1,376 +0,0 @@
/** @file
The TPM2 definition block in ACPI table for TCG2 physical presence
and MemoryClear.
Copyright (c) 2017 - 2018, Intel Corporation. All rights reserved.<BR>
SPDX-License-Identifier: BSD-2-Clause-Patent
**/
DefinitionBlock (
"Tpm.aml",
"SSDT",
2,
"INTEL ",
"Tpm2Tabl",
0x1000
)
{
Scope (\_SB)
{
Device (TPM)
{
//
// TCG2
//
Name (_HID, "MSFT0101")
//
// Readable name of this device, don't know if this way is correct yet
//
Name (_STR, Unicode ("TPM 2.0 Device"))
//
// Return the resource consumed by TPM device
//
Name (_CRS, ResourceTemplate () {
Memory32Fixed (ReadOnly, 0xfed40000, 0x5000)
})
//
// Operational region for Smi port access
//
OperationRegion (SMIP, SystemIO, 0xB2, 1)
Field (SMIP, ByteAcc, NoLock, Preserve)
{
IOB2, 8
}
//
// Operational region for Smi Data transfer
//
OperationRegion (SMDP, SystemIO, 0xB3, 1)
Field (SMDP, ByteAcc, NoLock, Preserve)
{
IOB3, 8
}
//
// Operational region for TPM access
//
OperationRegion (TPMR, SystemMemory, 0xfed40000, 0x5000)
Field (TPMR, AnyAcc, NoLock, Preserve)
{
ACC0, 8,
}
//
// Operational region for ACPI Control (SMI_EN) access
//
OperationRegion (SMIN, SystemIO, 0x1830, 0x4)
Field (SMIN, AnyAcc, NoLock, Preserve)
{
SMIE, 32
}
//
// Operational region for TPM support, TPM Physical Presence and TPM Memory Clear
// Region Offset 0xFFFF0000 and Length 0xF0 will be fixed in C code.
//
OperationRegion (TNVS, SystemMemory, 0xFFFF0000, 0xF0)
Field (TNVS, AnyAcc, NoLock, Preserve)
{
PPIN, 8, // Software SMI for Physical Presence Interface
PPIP, 32, // Used for save physical presence paramter
PPRP, 32, // Physical Presence request operation response
PPRQ, 32, // Physical Presence request operation
PPRM, 32, // Physical Presence request operation parameter
LPPR, 32, // Last Physical Presence request operation
FRET, 32, // Physical Presence function return code
MCIN, 8, // Software SMI for Memory Clear Interface
MCIP, 32, // Used for save the Mor paramter
MORD, 32, // Memory Overwrite Request Data
MRET, 32 // Memory Overwrite function return code
}
Method (_STA, 0)
{
if (LEqual (ACC0, 0xff))
{
Return (0)
}
Return (0x0f)
}
//
// TCG Hardware Information
//
Method (HINF, 3, Serialized, 0, {BuffObj, PkgObj}, {UnknownObj, UnknownObj, UnknownObj}) // IntObj, IntObj, PkgObj
{
//
// Switch by function index
//
Switch (ToInteger(Arg1))
{
Case (0)
{
//
// Standard query
//
Return (Buffer () {0x03})
}
Case (1)
{
//
// Return failure if no TPM present
//
Name(TPMV, Package () {0x01, Package () {0x2, 0x0}})
if (LEqual (_STA (), 0x00))
{
Return (Package () {0x00})
}
//
// Return TPM version
//
Return (TPMV)
}
Default {BreakPoint}
}
Return (Buffer () {0})
}
Name(TPM2, Package (0x02){
Zero,
Zero
})
Name(TPM3, Package (0x03){
Zero,
Zero,
Zero
})
//
// TCG Physical Presence Interface
//
Method (TPPI, 3, Serialized, 0, {BuffObj, PkgObj, IntObj, StrObj}, {UnknownObj, UnknownObj, UnknownObj}) // IntObj, IntObj, PkgObj
{
//
// Switch by function index
//
Switch (ToInteger(Arg1))
{
Case (0)
{
//
// Standard query, supports function 1-8
//
Return (Buffer () {0xFF, 0x01})
}
Case (1)
{
//
// a) Get Physical Presence Interface Version
//
Return ("1.3")
}
Case (2)
{
//
// b) Submit TPM Operation Request to Pre-OS Environment
//
//Check for SMM support
if(LEqual(And(SMIE,0x1),0x00))
{
//Not supported
Return (1)
}
Store (DerefOf (Index (Arg2, 0x00)), PPRQ)
Store (0x02, PPIP)
//
// Trigger the SMI interrupt
//
Store (PPIN, IOB3)
Store (0xFF, IOB2)
Return (FRET)
}
Case (3)
{
//
// c) Get Pending TPM Operation Requested By the OS
//
Store (PPRQ, Index (TPM2, 0x01))
Return (TPM2)
}
Case (4)
{
//
// d) Get Platform-Specific Action to Transition to Pre-OS Environment
//
Return (2)
}
Case (5)
{
//
// e) Return TPM Operation Response to OS Environment
//
//Check for SMM support
if(LEqual(And(SMIE,0x1),0x00))
{
//Not supported
Return (1)
}
Store (0x05, PPIP)
//
// Triggle the SMI interrupt
//
Store (PPIN, IOB3)
Store (0xFF, IOB2)
Store (LPPR, Index (TPM3, 0x01))
Store (PPRP, Index (TPM3, 0x02))
Return (TPM3)
}
Case (6)
{
//
// f) Submit preferred user language (Not implemented)
//
Return (3)
}
Case (7)
{
//
// g) Submit TPM Operation Request to Pre-OS Environment 2
//
//Check for SMM support
if(LEqual(And(SMIE,0x1),0x00))
{
//Not Implemented
Return (1)
}
Store (7, PPIP)
Store (DerefOf (Index (Arg2, 0x00)), PPRQ)
Store (0, PPRM)
If (LEqual (PPRQ, 23)) {
Store (DerefOf (Index (Arg2, 0x01)), PPRM)
}
//
// Trigger the SMI interrupt
//
Store (PPIN, IOB3)
Store (0xFF, IOB2)
Return (FRET)
}
Case (8)
{
//
// e) Get User Confirmation Status for Operation
//
//Check for SMM support
if(LEqual(And(SMIE,0x1),0x00))
{
//Not Implemented
Return (1)
}
Store (8, PPIP)
Store (DerefOf (Index (Arg2, 0x00)), PPRQ)
//
// Trigger the SMI interrupt
//
Store (PPIN, IOB3)
Store (0xFF, IOB2)
//
// This is not a Physical Presence Request. So restore PPRQ variable value to zero
//
Store (0, PPRQ)
Return (FRET)
}
Default {BreakPoint}
}
Return (1)
}
Method (TMCI, 3, Serialized, 0, IntObj, {UnknownObj, UnknownObj, UnknownObj}) // IntObj, IntObj, PkgObj
{
//
// Switch by function index
//
Switch (ToInteger (Arg1))
{
Case (0)
{
//
// Standard query, supports function 1-1
//
Return (Buffer () {0x03})
}
Case (1)
{
//
// Not Implemented
//
Return (1)
}
Default {BreakPoint}
}
Return (1)
}
Method (_DSM, 4, Serialized, 0, UnknownObj, {BuffObj, IntObj, IntObj, PkgObj})
{
//
// TCG Hardware Information
//
If(LEqual(Arg0, ToUUID ("cf8e16a5-c1e8-4e25-b712-4f54a96702c8")))
{
Return (HINF (Arg1, Arg2, Arg3))
}
//
// TCG Physical Presence Interface
//
If(LEqual(Arg0, ToUUID ("3dddfaa6-361b-4eb4-a424-8d10089d1653")))
{
Return (TPPI (Arg1, Arg2, Arg3))
}
//
// TCG Memory Clear Interface
//
If(LEqual(Arg0, ToUUID ("376054ed-cc13-4675-901c-4756d7f2d45d")))
{
Return (TMCI (Arg1, Arg2, Arg3))
}
Return (Buffer () {0})
}
}
}
}

274
Platform/CommonBoardPkg/AcpiTables/Tpm/TpmSsdt.asl
View File

@ -1,10 +1,9 @@
/**@file
/** @file
The TPM2 definition block in ACPI table for TCG2 physical presence
and MemoryClear.
Copyright (c) 2015 - 2017, Intel Corporation. All rights reserved.<BR>
(c) Copyright 2016 HP Development Company, L.P.<BR>
SPDX-License-Identifier: BSD-2-Clause-Patent
Copyright (c) 2017 - 2019, Intel Corporation. All rights reserved.<BR>
SPDX-License-Identifier: BSD-2-Clause-Patent
**/
@ -19,17 +18,13 @@ DefinitionBlock (
{
Scope (\_SB)
{
External(SMIE)
Device (TPM)
{
//
// TCG2
//
//
// TAG for patching TPM2.0 _HID
//
//Name (_HID, "NNNN0000")
Name (_HID, "MSFT0101")
//
@ -41,9 +36,26 @@ DefinitionBlock (
// Return the resource consumed by TPM device
//
Name (_CRS, ResourceTemplate () {
Memory32Fixed (ReadWrite, 0xfed40000, 0x5000)
Memory32Fixed (ReadOnly, 0xfed40000, 0x5000)
})
//
// Operational region for Smi port access
//
OperationRegion (SMIP, SystemIO, 0xB2, 1)
Field (SMIP, ByteAcc, NoLock, Preserve)
{
IOB2, 8
}
//
// Operational region for Smi Data transfer
//
OperationRegion (SMDP, SystemIO, 0xB3, 1)
Field (SMDP, ByteAcc, NoLock, Preserve)
{
IOB3, 8
}
//
// Operational region for TPM access
@ -54,6 +66,25 @@ DefinitionBlock (
ACC0, 8,
}
//
// Operational region for TPM support, TPM Physical Presence and TPM Memory Clear
// Region Offset 0xFFFF0000 and Length 0xF0 will be fixed in C code.
//
OperationRegion (TNVS, SystemMemory, 0xFFFF0000, 0xF0)
Field (TNVS, AnyAcc, NoLock, Preserve)
{
PPIN, 8, // Software SMI for Physical Presence Interface
PPIP, 32, // Used for save physical presence paramter
PPRP, 32, // Physical Presence request operation response
PPRQ, 32, // Physical Presence request operation
PPRM, 32, // Physical Presence request operation parameter
LPPR, 32, // Last Physical Presence request operation
FRET, 32, // Physical Presence function return code
MCIN, 8, // Software SMI for Memory Clear Interface
MCIP, 32, // Used for save the Mor paramter
MORD, 32, // Memory Overwrite Request Data
MRET, 32 // Memory Overwrite function return code
}
Method (_STA, 0)
{
@ -69,6 +100,7 @@ DefinitionBlock (
//
Method (HINF, 3, Serialized, 0, {BuffObj, PkgObj}, {UnknownObj, UnknownObj, UnknownObj}) // IntObj, IntObj, PkgObj
{
//
// Switch by function index
//
@ -100,10 +132,212 @@ DefinitionBlock (
Default {BreakPoint}
}
Return (Buffer () {0})
}
}
Name(TPM2, Package (0x02){
Zero,
Zero
})
Name(TPM3, Package (0x03){
Zero,
Zero,
Zero
})
//
// TCG Physical Presence Interface
//
Method (TPPI, 3, Serialized, 0, {BuffObj, PkgObj, IntObj, StrObj}, {UnknownObj, UnknownObj, UnknownObj}) // IntObj, IntObj, PkgObj
{
//
// Switch by function index
//
Switch (ToInteger(Arg1))
{
Case (0)
{
//
// Standard query, supports function 1-8
//
Return (Buffer () {0xFF, 0x01})
}
Case (1)
{
//
// a) Get Physical Presence Interface Version
//
Return ("1.3")
}
Case (2)
{
//
// b) Submit TPM Operation Request to Pre-OS Environment
//
//Check for SMM support
if(LEqual(And(SMIE,0x1),0x00))
{
//Not supported
Return (1)
}
Store (DerefOf (Index (Arg2, 0x00)), PPRQ)
Store (0x02, PPIP)
//
// Trigger the SMI interrupt
//
Store (PPIN, IOB3)
Store (0xFF, IOB2)
Return (FRET)
}
Case (3)
{
//
// c) Get Pending TPM Operation Requested By the OS
//
Store (PPRQ, Index (TPM2, 0x01))
Return (TPM2)
}
Case (4)
{
//
// d) Get Platform-Specific Action to Transition to Pre-OS Environment
//
Return (2)
}
Case (5)
{
//
// e) Return TPM Operation Response to OS Environment
//
//Check for SMM support
if(LEqual(And(SMIE,0x1),0x00))
{
//Not supported
Return (1)
}
Store (0x05, PPIP)
//
// Triggle the SMI interrupt
//
Store (PPIN, IOB3)
Store (0xFF, IOB2)
Store (LPPR, Index (TPM3, 0x01))
Store (PPRP, Index (TPM3, 0x02))
Return (TPM3)
}
Case (6)
{
//
// f) Submit preferred user language (Not implemented)
//
Return (3)
}
Case (7)
{
//
// g) Submit TPM Operation Request to Pre-OS Environment 2
//
//Check for SMM support
if(LEqual(And(SMIE,0x1),0x00))
{
//Not Implemented
Return (1)
}
Store (7, PPIP)
Store (DerefOf (Index (Arg2, 0x00)), PPRQ)
Store (0, PPRM)
If (LEqual (PPRQ, 23)) {
Store (DerefOf (Index (Arg2, 0x01)), PPRM)
}
//
// Trigger the SMI interrupt
//
Store (PPIN, IOB3)
Store (0xFF, IOB2)
Return (FRET)
}
Case (8)
{
//
// e) Get User Confirmation Status for Operation
//
//Check for SMM support
if(LEqual(And(SMIE,0x1),0x00))
{
//Not Implemented
Return (1)
}
Store (8, PPIP)
Store (DerefOf (Index (Arg2, 0x00)), PPRQ)
//
// Trigger the SMI interrupt
//
Store (PPIN, IOB3)
Store (0xFF, IOB2)
//
// This is not a Physical Presence Request. So restore PPRQ variable value to zero
//
Store (0, PPRQ)
Return (FRET)
}
Default {BreakPoint}
}
Return (1)
}
Method (TMCI, 3, Serialized, 0, IntObj, {UnknownObj, UnknownObj, UnknownObj}) // IntObj, IntObj, PkgObj
{
//
// Switch by function index
//
Switch (ToInteger (Arg1))
{
Case (0)
{
//
// Standard query, supports function 1-1
//
Return (Buffer () {0x03})
}
Case (1)
{
//
// Not Implemented
//
Return (1)
}
Default {BreakPoint}
}
Return (1)
}
Method (_DSM, 4, Serialized, 0, UnknownObj, {BuffObj, IntObj, IntObj, PkgObj})
{
//
// TCG Hardware Information
//
@ -112,6 +346,22 @@ DefinitionBlock (
Return (HINF (Arg1, Arg2, Arg3))
}
//
// TCG Physical Presence Interface
//
If(LEqual(Arg0, ToUUID ("3dddfaa6-361b-4eb4-a424-8d10089d1653")))
{
Return (TPPI (Arg1, Arg2, Arg3))
}
//
// TCG Memory Clear Interface
//
If(LEqual(Arg0, ToUUID ("376054ed-cc13-4675-901c-4756d7f2d45d")))
{
Return (TMCI (Arg1, Arg2, Arg3))
}
Return (Buffer () {0})
}
}