[QEMU] Add setup support for CFGDATA

This patch added required changes to support SBL setup for QEMU.
To enable this, set 'self.ENABLE_SBL_SETUP = 1' in BoardConfig.py.
In QEMU command line, use '-boot order=a' to trigger launching
Setup instead of normal boot flow.

Signed-off-by: Maurice Ma <maurice.ma@intel.com>

Platform/QemuBoardPkg/BoardConfig.py

@@ -62,6 +62,7 @@ class Board(BaseBoard):
         self.ENABLE_CRYPTO_SHA_OPT    = 0
 
         self.ENABLE_SMBIOS            = 1
+        self.ENABLE_SBL_SETUP         = 0
 
         self.CPU_MAX_LOGICAL_PROCESSOR_NUMBER = 255
 
@@ -109,6 +110,7 @@ class Board(BaseBoard):
         self.VARIABLE_SIZE        = 0x00002000
         self.SBLRSVD_SIZE         = 0x00001000
         self.FWUPDATE_SIZE        = 0x00018000 if self.ENABLE_FWU else 0
+        self.SETUP_SIZE           = 0x00020000 if self.ENABLE_SBL_SETUP else 0
 
         self._REDUNDANT_LAYOUT    = 1
         if not self._REDUNDANT_LAYOUT:
@@ -234,12 +236,32 @@ class Board(BaseBoard):
           ('TST5',      '',              'Dummy',        container_list_auth_type,   'KEY_ID_CONTAINER_COMP'+'_'+self._RSA_SIGN_TYPE,       0,              0x3000,    0),   # Component 5
           ('TST6',      '',               '',                    '',                                    '',                                 0,              0x1000,    0),   # Component 6
         ])
+
+        if self.ENABLE_SBL_SETUP:
+            def_auth = container_list_auth_type
+            cont_key = 'KEY_ID_CONTAINER'+'_'+self._RSA_SIGN_TYPE
+            mpy_efi   = 'PayloadPkg/PayloadBins/MicroPython.efi'
+            if not os.path.isfile(mpy_efi):
+                raise Exception ("MicroPython.efi is required under 'PayloadPkg/PayloadBins', please build MicroPython payload module separately !")
+            mpy_path  = '../../../' + mpy_efi
+            sbl_setup = '../../../BootloaderCorePkg/Tools/SblSetup.py'
+            container_list.append ([
+              # Name       | Image File |    CompressAlg  | AuthType    | Key File  | Region Align | Region Size |  Svn Info
+              # ==================================================================================================================================================================
+              ('SETP',     'SETP.bin',       '',            def_auth,   cont_key,     0,              0,         0),   # Container Header
+              ('MPYM',       mpy_path,       'Lzma',      'SHA2_384',         '',     0,              0x12000,   0),   # Component 1
+              ('STPY',      sbl_setup,       'Lz4',       'SHA2_384',         '',     0,              0x06000,   0),   # Component 2
+              ('CFGJ',    'CfgDataDef.json', 'Lzma',      'SHA2_384',         '',     0,              0x06000,   0),   # Component 3
+              ('CFGD',          '',          'Dummy',             '',         '',     0,              0x01000,   0),   # Component 4
+          ])
+
         return container_list
 
     def GetImageLayout (self):
 
         compress = '' if self.STAGE1B_XIP else 'Lz4'
         fwu_mode = STITCH_OPS.MODE_FILE_PAD if self.ENABLE_FWU else STITCH_OPS.MODE_FILE_IGNOR
+        setup_mode = STITCH_OPS.MODE_FILE_PAD if self.ENABLE_SBL_SETUP else STITCH_OPS.MODE_FILE_IGNOR
 
         img_list = []
 
@@ -271,6 +293,7 @@ class Board(BaseBoard):
                     ('EPAYLOAD.bin' ,  ''        , self.EPAYLOAD_SIZE, STITCH_OPS.MODE_FILE_PAD, STITCH_OPS.MODE_POS_TAIL),
                     ('SIIPFW.bin'   ,  ''        , self.SIIPFW_SIZE,   STITCH_OPS.MODE_FILE_PAD, STITCH_OPS.MODE_POS_TAIL),
                     ('PTEST.bin'    ,  ''        , self.TEST_SIZE,     STITCH_OPS.MODE_FILE_PAD, STITCH_OPS.MODE_POS_TAIL),
+                    ('SETP.bin'     ,  ''        , self.SETUP_SIZE,    setup_mode,               STITCH_OPS.MODE_POS_TAIL),
                     ]
                 ),
                 ('REDUNDANT_A.bin', [

Platform/QemuBoardPkg/Library/Stage2BoardInitLib/Stage2BoardInitLib.c

@@ -204,13 +204,15 @@ GpioInit (
   GpioTable  = (UINT8 *)AllocateTemporaryMemory (0);  //allocate new buffer
   GpioCfgDataBuffer = GpioTable;
 
-  for (Index = 0; Index  < GpioCfgHdr->GpioItemCount; Index++) {
+  if (GpioCfgBaseHdr != NULL) {
-    if (GpioCfgCurrHdr->GpioBaseTableBitMask[Index >> 3] & (1 << (Index & 7))) {
+    for (Index = 0; Index  < GpioCfgHdr->GpioItemCount; Index++) {
-      CopyMem (GpioTable, GpioCfgHdr->GpioTableData + Offset, GpioCfgHdr->GpioItemSize);
+      if (GpioCfgCurrHdr->GpioBaseTableBitMask[Index >> 3] & (1 << (Index & 7))) {
-      GpioTable += GpioCfgHdr->GpioItemSize;
+        CopyMem (GpioTable, GpioCfgHdr->GpioTableData + Offset, GpioCfgHdr->GpioItemSize);
-      GpioEntries++;
+        GpioTable += GpioCfgHdr->GpioItemSize;
+        GpioEntries++;
+      }
+      Offset += GpioCfgHdr->GpioItemSize;
     }
-    Offset += GpioCfgHdr->GpioItemSize;
   }
 
   if (GpioCfgCurrHdr != NULL) {
@@ -414,6 +416,7 @@ UpdateOsBootMediumInfo (
     //   Use '-boot order=c' or default to boot from eMMC
     //   Use '-boot order=d' to boot from SATA
     //   Use '-boot order=n' to boot from NVMe
+    //   Use '-boot order=a' to boot to setup
     //
     IoWrite8 (0x70, 0x3D);
     BootOrder = IoRead8  (0x71);
@@ -424,9 +427,20 @@ UpdateOsBootMediumInfo (
     } else if ((BootOrder & 0x0F) == 4) {
       // NVMe boot first
       OsBootOptionList->CurrentBoot = 2;
-    } else {
+    } else if ((BootOrder & 0x0F) == 2) {
       // SD boot first
       OsBootOptionList->CurrentBoot = 0;
+    } else if ((BootOrder & 0x0F) == 1) {
+      // Build setup boot option
+      if (FeaturePcdGet (PcdEnableSetup)) {
+        OsBootOptionList->OsBootOptionCount = 1;
+        OsBootOptionList->CurrentBoot       = 0;
+        OsBootOptionList->RestrictedBoot    = 1;
+        ZeroMem (OsBootOptionList->OsBootOption, sizeof(OS_BOOT_OPTION));
+        OsBootOptionList->OsBootOption[0].DevType   = OsBootDeviceMemory;
+        OsBootOptionList->OsBootOption[0].FsType    = EnumFileSystemTypeAuto;
+        CopyMem (OsBootOptionList->OsBootOption[0].Image[0].FileName, "!SETP/MPYM", 11);
+      }
     }
   }
 

Platform/QemuBoardPkg/Library/Stage2BoardInitLib/Stage2BoardInitLib.inf

@@ -63,4 +63,4 @@
   gPlatformModuleTokenSpaceGuid.PcdSmramTsegBase
   gPlatformModuleTokenSpaceGuid.PcdSmramTsegSize
   gPlatformModuleTokenSpaceGuid.PcdStage1BXip
-
+  gPlatformModuleTokenSpaceGuid.PcdEnableSetup