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[EHL] s0ix fix for Fusa sku 

Enable s0ix only for Non-Fusa sku
Removed PcdPreOsCheckerEnabled PCD flag

Signed-off-by: Ong Kok Tong <kok.tong.ong@intel.com>
This commit is contained in:
Ong Kok Tong 2021-06-02 23:46:58 +08:00 committed by Maurice Ma
parent 0eff01eb53
commit b78cbcf128
10 changed files with 50 additions and 23 deletions
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2
BootloaderCommonPkg/BootloaderCommonPkg.dec
View File

@ -272,8 +272,6 @@
gPlatformCommonLibTokenSpaceGuid.PcdSourceDebugEnabled | FALSE | BOOLEAN | 0x20000212
gPlatformCommonLibTokenSpaceGuid.PcdContainerBootEnabled | FALSE | BOOLEAN | 0x20000213
gPlatformCommonLibTokenSpaceGuid.PcdEmmcHs400SupportEnabled | TRUE | BOOLEAN | 0x20000214
# Determine if the Pre-OS checker should be executed or not.
gPlatformCommonLibTokenSpaceGuid.PcdPreOsCheckerEnabled | FALSE | BOOLEAN | 0x20000215
# This PCD will force to initialize SerialPort regardless of its initialized state
gPlatformCommonLibTokenSpaceGuid.PcdForceToInitSerialPort | FALSE | BOOLEAN | 0x20000216
# This PCD will enable very basic debug Shell so that it can work in early stage such as 1A/1B/2.

1
BootloaderCorePkg/BootloaderCorePkg.dsc
View File

@ -319,7 +319,6 @@
gPayloadTokenSpaceGuid.PcdCsmeUpdateEnabled | $(ENABLE_CSME_UPDATE)
gPlatformModuleTokenSpaceGuid.PcdLegacyEfSegmentEnabled | $(ENABLE_LEGACY_EF_SEG)
gPlatformCommonLibTokenSpaceGuid.PcdEmmcHs400SupportEnabled | $(ENABLE_EMMC_HS400)
gPlatformCommonLibTokenSpaceGuid.PcdPreOsCheckerEnabled | $(ENABLE_PRE_OS_CHECKER)
gPlatformCommonLibTokenSpaceGuid.PcdDmaProtectionEnabled | $(ENABLE_DMA_PROTECTION)
gPlatformCommonLibTokenSpaceGuid.PcdMultiUsbBootDeviceEnabled | $(ENABLE_MULTI_USB_BOOT_DEV)
gPlatformCommonLibTokenSpaceGuid.PcdCpuX2ApicEnabled | $(SUPPORT_X2APIC)

1
PayloadPkg/OsLoader/OsLoader.inf
View File

@ -109,7 +109,6 @@
gPlatformCommonLibTokenSpaceGuid.PcdFrameBufferMaxConsoleHeight
gPayloadTokenSpaceGuid.PcdGrubBootCfgEnabled
gPlatformCommonLibTokenSpaceGuid.PcdContainerBootEnabled
gPlatformCommonLibTokenSpaceGuid.PcdPreOsCheckerEnabled
gPlatformCommonLibTokenSpaceGuid.PcdMeasuredBootHashMask
[Depex]

3
Platform/ElkhartlakeBoardPkg/AcpiTables/Fadt/Fadt6.1.h
View File

@ -67,8 +67,7 @@
EFI_ACPI_6_1_RTC_S4 | \
EFI_ACPI_6_1_SLP_BUTTON | \
EFI_ACPI_6_1_PROC_C1 | \
EFI_ACPI_6_1_RESET_REG_SUP | \
EFI_ACPI_6_1_LOW_POWER_S0_IDLE_CAPABLE \
EFI_ACPI_6_1_RESET_REG_SUP \
)

9
Platform/ElkhartlakeBoardPkg/Library/Stage1BBoardInitLib/Stage1BBoardInitLib.c
View File

@ -236,10 +236,12 @@ UpdateFspConfig (
UINT32 Index;
UINT8 DebugPort;
FEATURES_CFG_DATA *FeaturesCfgData;
BOOLEAN PchSciSupported;
FspmUpd = (FSPM_UPD *)FspmUpdPtr;
FspmArchUpd = &FspmUpd->FspmArchUpd;
Fspmcfg = &FspmUpd->FspmConfig;
PchSciSupported = PchIsSciSupported ();
DebugPort = GetDebugPort ();
if (DebugPort < PCH_MAX_SERIALIO_UART_CONTROLLERS) {
@ -314,8 +316,7 @@ UpdateFspConfig (
Fspmcfg->TcssXhciEn = MemCfgData->TcssXhciEn;
Fspmcfg->TcssXdciEn = MemCfgData->TcssXdciEn;
if (FeaturesCfgData != NULL) {
if (FeaturesCfgData->Features.LowPowerIdle != 0){
DEBUG ((DEBUG_INFO, "FeaturesCfgData->Features.LowPowerIdle = 0x%x\n",FeaturesCfgData->Features.LowPowerIdle));
if (FeaturesCfgData->Features.LowPowerIdle != 0 && PchSciSupported != 1){
Fspmcfg->TcssXdciEn = 0;
}
}
@ -620,11 +621,11 @@ UpdateFspConfig (
for (Index = 0; Index < PCH_MAX_HDA_SSP_LINK_NUM; Index++) {
Fspmcfg->PchHdaAudioLinkSspEnable[Index] = 0;
}
if (!FeaturePcdGet (PcdPreOsCheckerEnabled) && !PchIsSciSupported ()) {
if (PchSciSupported != 1) {
Fspmcfg->PchHdaAudioLinkSspEnable[0] = 1;
}
for (Index = 0; Index < PCH_MAX_HDA_DMIC_LINK_NUM; Index++) {
if (FeaturePcdGet (PcdPreOsCheckerEnabled) && PchIsSciSupported ()) {
if (PchSciSupported) {
Fspmcfg->PchHdaAudioLinkDmicEnable[Index] = 0;
}
}

1
Platform/ElkhartlakeBoardPkg/Library/Stage1BBoardInitLib/Stage1BBoardInitLib.inf
View File

@ -57,4 +57,3 @@
gPlatformCommonLibTokenSpaceGuid.PcdMeasuredBootEnabled
gPlatformModuleTokenSpaceGuid.PcdAcpiEnabled
gPlatformModuleTokenSpaceGuid.PcdVtdEnabled
gPlatformCommonLibTokenSpaceGuid.PcdPreOsCheckerEnabled

19
Platform/ElkhartlakeBoardPkg/Library/Stage2BoardInitLib/Stage2BoardInitLib.c
View File

@ -216,6 +216,8 @@ SI_PCH_DEVICE_INTERRUPT_CONFIG mPchDevIntConfig[] = {
{16, 7, SiPchIntB, PchPIRQB} // THC #1
};
STATIC UINT8 mPchSciSupported = 0xFF;
UINT8
GetSerialPortStrideSize (
VOID
@ -662,11 +664,15 @@ BoardInit (
UINT32 TsegBase;
UINT32 TsegSize;
if (mPchSciSupported == 0xFF){
mPchSciSupported = PchIsSciSupported();
}
switch (InitPhase) {
case PreSiliconInit:
EnableLegacyRegions ();
ConfigureGpio (CDATA_GPIO_TAG, 0, NULL);
if (FeaturePcdGet (PcdPreOsCheckerEnabled) && PchIsSciSupported ()) {
if (mPchSciSupported) {
DEBUG ((DEBUG_INFO, "GpioPadConfigTable for Fusa\n"));
ConfigureGpio (CDATA_NO_TAG, ARRAY_SIZE(mGpioTablePreMemEhlFusa), (UINT8*)mGpioTablePreMemEhlFusa);
}
@ -707,7 +713,7 @@ BoardInit (
case PostPciEnumeration:
// Set pre-OS checker features flag
LdrGlobal = (LOADER_GLOBAL_DATA *)GetLoaderGlobalDataPointer ();
if (FeaturePcdGet (PcdPreOsCheckerEnabled) && PchIsSciSupported ()) {
if (mPchSciSupported) {
if (!SciBootSuccess ()) {
DEBUG ((DEBUG_WARN, "SCI device has boot issue\n"));
}
@ -1130,8 +1136,7 @@ UpdateFspConfig (
Fspscfg->XdciEnable = SiCfgData->XdciEnable;
FeaturesCfgData = (FEATURES_CFG_DATA *) FindConfigDataByTag(CDATA_FEATURES_TAG);
if (FeaturesCfgData != NULL) {
if (FeaturesCfgData->Features.LowPowerIdle != 0){
DEBUG ((DEBUG_INFO, "FeaturesCfgData->Features.LowPowerIdle = 0x%x\n",FeaturesCfgData->Features.LowPowerIdle));
if (FeaturesCfgData->Features.LowPowerIdle != 0 && mPchSciSupported != 1){
Fspscfg->XdciEnable = 0;
}
}
@ -1542,7 +1547,7 @@ UpdateFspConfig (
ASSERT (SiCfgData != NULL);
} //end of SiCfgData
if (FeaturePcdGet (PcdPreOsCheckerEnabled) && PchIsSciSupported ()) {
if (mPchSciSupported) {
Fspscfg->IsFusaSupported = 0x1;
Fspscfg->IehMode = 0x1;
//
@ -1678,7 +1683,7 @@ UpdateFspConfig (
Fspscfg->CstateLatencyControl5Irtl = PowerCfgData->CstateLatencyControl5Irtl;
}
if (FeaturePcdGet (PcdPreOsCheckerEnabled) && PchIsSciSupported ()) {
if (mPchSciSupported) {
DEBUG ((DEBUG_INFO, "Applying Fusa FSP UPD settings.........\n"));
Fspscfg->Eist = 0; // Intel Speed Step->EnableGv
Fspscfg->Hwp = 0; // Intel Speed Shift
@ -1841,7 +1846,7 @@ UpdateOsBootMediumInfo (
FillBootOptionListFromCfgData (OsBootOptionList);
// Disable PreOS checker since the SKU doesn't support it
if (!PchIsSciSupported ()) {
if (mPchSciSupported) {
for (Idx = 0; Idx < OsBootOptionList->OsBootOptionCount; Idx++) {
BootOption = &(OsBootOptionList->OsBootOption[Idx]);
if ((BootOption->BootFlags & BOOT_FLAGS_PREOS) != 0) {

1
Platform/ElkhartlakeBoardPkg/Library/Stage2BoardInitLib/Stage2BoardInitLib.inf
View File

@ -92,7 +92,6 @@
gPlatformModuleTokenSpaceGuid.PcdSmmRebaseMode
gPlatformModuleTokenSpaceGuid.PcdSmramTsegBase
gPlatformModuleTokenSpaceGuid.PcdSmramTsegSize
gPlatformCommonLibTokenSpaceGuid.PcdPreOsCheckerEnabled
gPlatformCommonLibTokenSpaceGuid.PcdMeasuredBootEnabled
gPlatformModuleTokenSpaceGuid.PcdPsdBiosEnabled
gPlatformModuleTokenSpaceGuid.PcdSmbiosStringsPtr

15
Platform/ElkhartlakeBoardPkg/Library/Stage2BoardInitLib/UpdateAcpiGnvs.c
View File

@ -31,6 +31,8 @@
#include <Register/PseRegs.h>
#include <Register/SaRegsHostBridge.h>
#include <Library/PchSciLib.h>
#include <Library/ConfigDataLib.h>
#include <ConfigDataDefs.h>
#include <Library/GpioSocLib.h>
#define XTAL_FREQ_24MHZ 0
@ -491,12 +493,16 @@ PlatformUpdateAcpiGnvs (
UINTN PseCanPciMmBase;
UINTN_STRUCT MchBarBase;
EFI_STATUS Status;
FEATURES_CFG_DATA *FeaturesCfgData;
BOOLEAN PchSciSupported;
PchSciSupported = PchIsSciSupported ();
GlobalNvs = (GLOBAL_NVS_AREA *) GnvsIn;
PlatformNvs = (PLATFORM_NVS_AREA *) &GlobalNvs->PlatformNvs;
PchNvs = (PCH_NVS_AREA *) &GlobalNvs->PchNvs;
CpuNvs = (CPU_NVS_AREA *) &GlobalNvs->CpuNvs;
SaNvs = (SYSTEM_AGENT_NVS_AREA *) &GlobalNvs->SaNvs;
FeaturesCfgData = (FEATURES_CFG_DATA *) FindConfigDataByTag(CDATA_FEATURES_TAG);
ZeroMem (GlobalNvs, sizeof (GLOBAL_NVS_AREA));
//
@ -671,8 +677,13 @@ PlatformUpdateAcpiGnvs (
PlatformNvs->ApicEnable = 1;
PlatformNvs->EcAvailable = 0;
PlatformNvs->LowPowerS0Idle = 0;
if (FeaturesCfgData != NULL) {
if (FeaturesCfgData->Features.LowPowerIdle != 0 && PchSciSupported != 1){
PlatformNvs->LowPowerS0Idle = 1;
}
}
DEBUG((DEBUG_INFO, "PlatformNvs->LowPowerS0Idle = 0x%x\n ", PlatformNvs->LowPowerS0Idle));
PlatformNvs->TenSecondPowerButtonEnable = 8;
//
@ -845,7 +856,7 @@ PlatformUpdateAcpiGnvs (
PlatformNvs->PpmFlags = CpuNvs->PpmFlags;
SocUpdateAcpiGnvs ((VOID *)GnvsIn);
if (FeaturePcdGet (PcdPreOsCheckerEnabled) && PchIsSciSupported ()) {
if (PchSciSupported) {
PlatformNvs->Rtd3Support = 0;
PlatformNvs->LowPowerS0Idle = 0;
}

19
Platform/ElkhartlakeBoardPkg/Library/Stage2BoardInitLib/UpdateAcpiTable.c
View File

@ -28,6 +28,7 @@
#include "ConfigDataStruct.h"
#include <Lpit.h>
#include <Register/PmcRegs.h>
#include <Library/PchSciLib.h>
#define NHLT_ACPI_TABLE_SIGNATURE SIGNATURE_32 ('N', 'H', 'L', 'T')
@ -374,9 +375,12 @@ PlatformUpdateAcpiTable (
EFI_STATUS Status;
PLATFORM_DATA *PlatformData;
LOADER_GLOBAL_DATA *LdrGlobal;
FEATURES_CFG_DATA *FeaturesCfgData;
EFI_ACPI_6_1_FIXED_ACPI_DESCRIPTION_TABLE *FadtPointer;
LdrGlobal = (LOADER_GLOBAL_DATA *)GetLoaderGlobalDataPointer ();
GlobalNvs = (GLOBAL_NVS_AREA *)(UINTN) PcdGet32 (PcdAcpiGnvsAddress);
FeaturesCfgData = (FEATURES_CFG_DATA *) FindConfigDataByTag(CDATA_FEATURES_TAG);
Table = (EFI_ACPI_DESCRIPTION_HEADER *) Current;
Ptr = (UINT8 *)Table;
@ -434,6 +438,19 @@ PlatformUpdateAcpiTable (
} else if (Table->Signature == EFI_BDAT_TABLE_SIGNATURE) {
UpdateBdatAcpiTable (Table, LdrGlobal->FspHobList);
DEBUG ((DEBUG_INFO, "Updated BDAT Table in AcpiTable Entries\n"));
} else if (Table->Signature == EFI_ACPI_6_1_FIXED_ACPI_DESCRIPTION_TABLE_SIGNATURE) {
DEBUG ( (DEBUG_INFO, "Updated FADT Table entries in AcpiTable\n") );
FadtPointer = (EFI_ACPI_6_1_FIXED_ACPI_DESCRIPTION_TABLE *) Table;
//
// The Flags field within the FADT (offset 112)
// 1) will have a new Low Power S0 Idle Capable ACPI flag (bit offset 21).
//
if (FeaturesCfgData != NULL) {
if (FeaturesCfgData->Features.LowPowerIdle != 0 && PchIsSciSupported() != 1){
DEBUG ( (DEBUG_INFO, "Enabled Low Power S0 Idle Capable ACPI flag\n") );
FadtPointer->Flags = (EFI_ACPI_6_1_LOW_POWER_S0_IDLE_CAPABLE | FadtPointer->Flags);
}
}
} else if (Table->Signature == EFI_ACPI_6_1_LOW_POWER_IDLE_TABLE_STRUCTURE_SIGNATURE){
UINT8 LpitStateEntries = 0;
EFI_ACPI_6_1_GENERIC_ADDRESS_STRUCTURE SetResidencyCounter[2] = { ACPI_LPI_RES_SLP_S0_COUNTER, ACPI_LPI_RES_C10_COUNTER };
@ -453,7 +470,7 @@ PlatformUpdateAcpiTable (
(((ACPI_LOW_POWER_IDLE_TABLE *)Table)->LpiStates[LpitStateEntries - 1].ResidencyCounter) = SetResidencyCounter[0];
(((ACPI_LOW_POWER_IDLE_TABLE *)Table)->LpiStates[LpitStateEntries - 1].ResidencyCounterFrequency) = ResidencyCounterFrequency;
}
}else if (Table->Signature == EFI_ACPI_VTD_DMAR_TABLE_SIGNATURE) {
} else if (Table->Signature == EFI_ACPI_VTD_DMAR_TABLE_SIGNATURE) {
if (FeaturePcdGet (PcdVtdEnabled)) {
PlatformData = (PLATFORM_DATA *)GetPlatformDataPtr ();
if (PlatformData != NULL) {