Support different CPU sort method

Different use case might want to have a different CPU order.
e.g. P-core first or E-core first.
This patch adds an option to help user sort CPU.

platform could add "self.CPU_SORT_METHOD  = value" to
BoardConfig.py to override the default value.

Signed-off-by: Guo Dong <guo.dong@intel.com>
This commit is contained in:
Guo Dong 2022-04-13 15:34:41 -07:00
parent c2e2dfa6ac
commit a7163e897a
5 changed files with 39 additions and 18 deletions

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@ -146,6 +146,10 @@
gPlatformModuleTokenSpaceGuid.PcdSeedListBufferSize | 0x00000400 | UINT32 | 0x200000E2
gPlatformModuleTokenSpaceGuid.PcdSmbiosTablesSize | 0x1000 | UINT16 | 0x200000E3
# 0: Sort the CPU according to their thread distances
# 1: Sort the CPU based on CPU APIC ID in ascending order
# 2: Sort the CPU based on CPU APIC ID in descending order
gPlatformModuleTokenSpaceGuid.PcdCpuSortMethod | 0 | UINT32 | 0x200000E4
# Size of the Hash store allocated in bootloader
gPlatformModuleTokenSpaceGuid.PcdHashStoreSize | 0x00000200 | UINT32 | 0x200000F1

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@ -230,6 +230,7 @@
gPlatformModuleTokenSpaceGuid.PcdAcpiProcessorIdBase | $(ACPI_PROCESSOR_ID_BASE)
gPlatformModuleTokenSpaceGuid.PcdCpuMaxLogicalProcessorNumber | $(CPU_MAX_LOGICAL_PROCESSOR_NUMBER)
gPlatformModuleTokenSpaceGuid.PcdCpuSortMethod | $(CPU_SORT_METHOD)
gPlatformCommonLibTokenSpaceGuid.PcdConsoleInDeviceMask | $(CONSOLE_IN_DEVICE_MASK)
gPlatformCommonLibTokenSpaceGuid.PcdConsoleOutDeviceMask | $(CONSOLE_OUT_DEVICE_MASK)

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@ -1,7 +1,7 @@
/** @file
MP init library implementation.
Copyright (c) 2015 - 2021, Intel Corporation. All rights reserved.<BR>
Copyright (c) 2015 - 2022, Intel Corporation. All rights reserved.<BR>
SPDX-License-Identifier: BSD-2-Clause-Patent
**/
@ -74,10 +74,11 @@ CompareCpuApicId (
}
/**
Sort the CPU entry according to their thread distances
Sort the CPU entry
It is required to list CPU thread with further distance first so as to
fully utilize unshared CPU resources.
It sort the CPU by the PCD PcdCpuSortMethod. Sort CPU by APIC ID in ascending order could make the debug easy.
Sort CPU by the APIC ID in descending order might be required by some special case.
Sort CPU by their thread distances could help fully utilize unshared CPU resources.
@param[in] SysCpuInfo Pointer to the ALL_CPU_INFO structure.
@ -98,22 +99,35 @@ SortSysCpu (
return;
}
// Sort by APIC ID first
// Sort the CPU by APIC ID
PerformQuickSort (SysCpuInfo->CpuInfo, SysCpuInfo->CpuCount, sizeof (CPU_INFO), CompareCpuApicId, &Temp);
// Keep a backup copy
CopyMem (&OldSysCpuInfo, SysCpuInfo, sizeof (ALL_CPU_INFO));
if (FixedPcdGet32 (PcdCpuSortMethod) == 2) {
// Sort the CPU by CPU APIC ID in descending order
for (Idx1 = 0; Idx1 < SysCpuInfo->CpuCount / 2; Idx1++) {
CopyMem (&Temp, &SysCpuInfo->CpuInfo[Idx1], sizeof(CPU_INFO));
CopyMem (&SysCpuInfo->CpuInfo[Idx1], &SysCpuInfo->CpuInfo[SysCpuInfo->CpuCount - Idx1 - 1], sizeof(CPU_INFO));
CopyMem (&SysCpuInfo->CpuInfo[SysCpuInfo->CpuCount - Idx1 - 1], &Temp, sizeof(CPU_INFO));
}
}
// Rearrange order per thread distance
Idx2 = 0;
Step = GetPowerOfTwo32 (SysCpuInfo->CpuCount);
for (; Step > 0; Step >>= 1) {
for (Idx1 = 0; Idx1 < SysCpuInfo->CpuCount; Idx1 += Step) {
if ((OldSysCpuInfo.CpuInfo[Idx1].ApicId != 0xFFFFFFFF) && (Idx2 < SysCpuInfo->CpuCount)) {
// Fill the CPU_INFO and mark it as consumed
CopyMem (&SysCpuInfo->CpuInfo[Idx2], &OldSysCpuInfo.CpuInfo[Idx1], sizeof(CPU_INFO));
OldSysCpuInfo.CpuInfo[Idx1].ApicId = 0xFFFFFFFF;
Idx2++;
if (FixedPcdGet32 (PcdCpuSortMethod) == 0) {
// Sort the CPU according to their thread distances
// Keep a backup copy
CopyMem (&OldSysCpuInfo, SysCpuInfo, sizeof (ALL_CPU_INFO));
// Rearrange order per thread distance
Idx2 = 0;
Step = GetPowerOfTwo32 (SysCpuInfo->CpuCount);
for (; Step > 0; Step >>= 1) {
for (Idx1 = 0; Idx1 < SysCpuInfo->CpuCount; Idx1 += Step) {
if ((OldSysCpuInfo.CpuInfo[Idx1].ApicId != 0xFFFFFFFF) && (Idx2 < SysCpuInfo->CpuCount)) {
// Fill the CPU_INFO and mark it as consumed
CopyMem (&SysCpuInfo->CpuInfo[Idx2], &OldSysCpuInfo.CpuInfo[Idx1], sizeof(CPU_INFO));
OldSysCpuInfo.CpuInfo[Idx1].ApicId = 0xFFFFFFFF;
Idx2++;
}
}
}
}

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@ -1,6 +1,6 @@
## @file
#
# Copyright (c) 2017 - 2019, Intel Corporation. All rights reserved.<BR>
# Copyright (c) 2017 - 2022, Intel Corporation. All rights reserved.<BR>
# SPDX-License-Identifier: BSD-2-Clause-Patent
#
##
@ -54,6 +54,7 @@
[FixedPcd]
gPlatformModuleTokenSpaceGuid.PcdCpuMaxLogicalProcessorNumber
gPlatformModuleTokenSpaceGuid.PcdCpuSortMethod
[Pcd]
gPlatformModuleTokenSpaceGuid.PcdSmramTsegBase

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@ -186,6 +186,7 @@ class BaseBoard(object):
self.BUILD_CSME_UPDATE_DRIVER = 0
self.CPU_MAX_LOGICAL_PROCESSOR_NUMBER = 16
self.CPU_SORT_METHOD = 0
self.ACM_SIZE = 0
self.DIAGNOSTICACM_SIZE = 0