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[EHL] Update FSP version since MR3 is released 

Also set the CpuTempSensorReadEnable = 1
It was renamed from PchCpuTempSensorEnable
and removed in commit 44faa431c9

Signed-off-by: Randy Lin <randy.lin@intel.com>
This commit is contained in:
Randy Lin 2022-04-28 17:03:33 +08:00 committed by Guo Dong
parent 4a734902f1
commit a3eeef4e31
2 changed files with 2 additions and 2 deletions
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2
Platform/ElkhartlakeBoardPkg/Library/Stage2BoardInitLib/Stage2BoardInitLib.c
View File

@ -965,7 +965,7 @@ FspUpdatePsePolicy (
Fspscfg->PchPseOobEnabled = 0;
Fspscfg->PchPseWoLEnabled = 1;
Fspscfg->PchPseAicEnabled = (UINT8)SiCfgData->PchPseAicEnabled;
Fspscfg->CpuTempSensorReadEnable= 1;
//Fspscfg->PseJtagEnabled = 0;
//Fspscfg->PseJtagPinMux = 0;

2
Silicon/ElkhartlakePkg/FspBin/FspBin.inf
View File

@ -11,7 +11,7 @@
[UserExtensions.SBL."CloneRepo"]
REPO = https://github.com/intel/FSP.git
COMMIT = ccf7f35c13770174078a0492e0d95bb0afa806cb
COMMIT = 72266f6523286fb3494f5b2553ace612d1dc95c4
[UserExtensions.SBL."CopyList"]
ElkhartLakeFspBinPkg/FspBin/FSPRel.bin : Silicon/ElkhartlakePkg/FspBin/FspDbg.bin