diff --git a/BootloaderCommonPkg/BootloaderCommonPkg.dec b/BootloaderCommonPkg/BootloaderCommonPkg.dec
index 4af261b5..5aa927d6 100644
--- a/BootloaderCommonPkg/BootloaderCommonPkg.dec
+++ b/BootloaderCommonPkg/BootloaderCommonPkg.dec
@@ -51,6 +51,12 @@
gEdkiiFpdtExtendedFirmwarePerformanceGuid = { 0x3b387bfd, 0x7abc, 0x4cf2, { 0xa0, 0xca, 0xb6, 0xa1, 0x6c, 0x1b, 0x1b, 0x25 } }
gTccRtctHobGuid = { 0x6bddb43d, 0x1782, 0x4d9c, { 0xb6, 0x80, 0xe3, 0xde, 0x45, 0xe0, 0x37, 0x4a } }
+ #
+ # GUID defined in UniversalPayload
+ #
+ ## Include/UniversalPayload/PciRootBridges.h
+ gUniversalPayloadPciRootBridgeInfoGuid = { 0xec4ebacb, 0x2638, 0x416e, { 0xbe, 0x80, 0xe5, 0xfa, 0x4b, 0x51, 0x19, 0x01 }}
+
[PcdsFixedAtBuild]
gPlatformCommonLibTokenSpaceGuid.PcdMaxLibraryDataEntry | 8 | UINT32 | 0x20000100
gPlatformCommonLibTokenSpaceGuid.PcdPcdLibId | 0 | UINT8 | 0x20000101
@@ -253,6 +259,7 @@
# BIT1 - Print FSP HOB boot performance data.
gPlatformCommonLibTokenSpaceGuid.PcdBootPerformanceMask | 0x00000001 | UINT32 | 0x00010092
+
[PcdsDynamic]
## This PCD indicates the PCR bank to be enabled/supported by Slim Bootloader for measured boot
# Based on the value set, PCR bank world be enabled and extended
diff --git a/BootloaderCommonPkg/Include/UniversalPayload/AcpiTable.h b/BootloaderCommonPkg/Include/UniversalPayload/AcpiTable.h
new file mode 100644
index 00000000..33ef7263
--- /dev/null
+++ b/BootloaderCommonPkg/Include/UniversalPayload/AcpiTable.h
@@ -0,0 +1,30 @@
+/** @file
+ Define the structure for the Universal Payload APCI table.
+
+Copyright (c) 2021, Intel Corporation. All rights reserved.
+SPDX-License-Identifier: BSD-2-Clause-Patent
+
+ @par Revision Reference:
+ - Universal Payload Specification 0.75 (https://universalpayload.github.io/documentation/)
+**/
+
+#ifndef UNIVERSAL_PAYLOAD_ACPI_TABLE_H_
+#define UNIVERSAL_PAYLOAD_ACPI_TABLE_H_
+
+#include
+#include
+
+#pragma pack(1)
+
+typedef struct {
+ UNIVERSAL_PAYLOAD_GENERIC_HEADER Header;
+ EFI_PHYSICAL_ADDRESS Rsdp;
+} UNIVERSAL_PAYLOAD_ACPI_TABLE;
+
+#pragma pack()
+
+#define UNIVERSAL_PAYLOAD_ACPI_TABLE_REVISION 1
+
+extern GUID gUniversalPayloadAcpiTableGuid;
+
+#endif // UNIVERSAL_PAYLOAD_ACPI_TABLE_H_
diff --git a/BootloaderCommonPkg/Include/UniversalPayload/ExtraData.h b/BootloaderCommonPkg/Include/UniversalPayload/ExtraData.h
new file mode 100644
index 00000000..1128f5f4
--- /dev/null
+++ b/BootloaderCommonPkg/Include/UniversalPayload/ExtraData.h
@@ -0,0 +1,30 @@
+/** @file
+
+ Copyright (c) 2021, Intel Corporation. All rights reserved.
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+#ifndef EXTRA_DATA_H_
+#define EXTRA_DATA_H_
+
+extern GUID gUniversalPayloadExtraDataGuid;
+
+#pragma pack(1)
+
+typedef struct {
+ CHAR8 Identifier[16];
+ EFI_PHYSICAL_ADDRESS Base;
+ UINT64 Size;
+} UNIVERSAL_PAYLOAD_EXTRA_DATA_ENTRY;
+
+typedef struct {
+ UNIVERSAL_PAYLOAD_GENERIC_HEADER Header;
+ UINT32 Count;
+ UNIVERSAL_PAYLOAD_EXTRA_DATA_ENTRY Entry[0];
+} UNIVERSAL_PAYLOAD_EXTRA_DATA;
+
+#pragma pack()
+
+#define UNIVERSAL_PAYLOAD_EXTRA_DATA_REVISION 1
+
+#endif
diff --git a/BootloaderCommonPkg/Include/UniversalPayload/PciRootBridges.h b/BootloaderCommonPkg/Include/UniversalPayload/PciRootBridges.h
new file mode 100644
index 00000000..3a7aae82
--- /dev/null
+++ b/BootloaderCommonPkg/Include/UniversalPayload/PciRootBridges.h
@@ -0,0 +1,91 @@
+/** @file
+ This file defines the structure for the PCI Root Bridges.
+
+ Copyright (c) 2021, Intel Corporation. All rights reserved.
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+ @par Revision Reference:
+ - Universal Payload Specification 0.75 (https://universalpayload.github.io/documentation/)
+**/
+
+#ifndef UNIVERSAL_PAYLOAD_PCI_ROOT_BRIDGES_H_
+#define UNIVERSAL_PAYLOAD_PCI_ROOT_BRIDGES_H_
+
+#include
+
+#pragma pack(1)
+
+//
+// (Base > Limit) indicates an aperture is not available.
+//
+typedef struct {
+ //
+ // Base and Limit are the device address instead of host address when
+ // Translation is not zero
+ //
+ UINT64 Base;
+ UINT64 Limit;
+ //
+ // According to UEFI 2.7, Device Address = Host Address + Translation,
+ // so Translation = Device Address - Host Address.
+ // On platforms where Translation is not zero, the subtraction is probably to
+ // be performed with UINT64 wrap-around semantics, for we may translate an
+ // above-4G host address into a below-4G device address for legacy PCIe device
+ // compatibility.
+ //
+ // NOTE: The alignment of Translation is required to be larger than any BAR
+ // alignment in the same root bridge, so that the same alignment can be
+ // applied to both device address and host address, which simplifies the
+ // situation and makes the current resource allocation code in generic PCI
+ // host bridge driver still work.
+ //
+ UINT64 Translation;
+} UNIVERSAL_PAYLOAD_PCI_ROOT_BRIDGE_APERTURE;
+
+///
+/// Payload PCI Root Bridge Information HOB
+///
+typedef struct {
+ UINT32 Segment; ///< Segment number.
+ UINT64 Supports; ///< Supported attributes.
+ ///< Refer to EFI_PCI_ATTRIBUTE_xxx used by GetAttributes()
+ ///< and SetAttributes() in EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.
+ UINT64 Attributes; ///< Initial attributes.
+ ///< Refer to EFI_PCI_ATTRIBUTE_xxx used by GetAttributes()
+ ///< and SetAttributes() in EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.
+ BOOLEAN DmaAbove4G; ///< DMA above 4GB memory.
+ ///< Set to TRUE when root bridge supports DMA above 4GB memory.
+ BOOLEAN NoExtendedConfigSpace; ///< When FALSE, the root bridge supports
+ ///< Extended (4096-byte) Configuration Space.
+ ///< When TRUE, the root bridge supports
+ ///< 256-byte Configuration Space only.
+ UINT64 AllocationAttributes; ///< Allocation attributes.
+ ///< Refer to EFI_PCI_HOST_BRIDGE_COMBINE_MEM_PMEM and
+ ///< EFI_PCI_HOST_BRIDGE_MEM64_DECODE used by GetAllocAttributes()
+ ///< in EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL.
+ UNIVERSAL_PAYLOAD_PCI_ROOT_BRIDGE_APERTURE Bus; ///< Bus aperture which can be used by the root bridge.
+ UNIVERSAL_PAYLOAD_PCI_ROOT_BRIDGE_APERTURE Io; ///< IO aperture which can be used by the root bridge.
+ UNIVERSAL_PAYLOAD_PCI_ROOT_BRIDGE_APERTURE Mem; ///< MMIO aperture below 4GB which can be used by the root bridge.
+ UNIVERSAL_PAYLOAD_PCI_ROOT_BRIDGE_APERTURE MemAbove4G; ///< MMIO aperture above 4GB which can be used by the root bridge.
+ UNIVERSAL_PAYLOAD_PCI_ROOT_BRIDGE_APERTURE PMem; ///< Prefetchable MMIO aperture below 4GB which can be used by the root bridge.
+ UNIVERSAL_PAYLOAD_PCI_ROOT_BRIDGE_APERTURE PMemAbove4G; ///< Prefetchable MMIO aperture above 4GB which can be used by the root bridge.
+ UINT32 HID; ///< PnP hardware ID of the root bridge. This value must match the corresponding
+ ///< _HID in the ACPI name space.
+ UINT32 UID; ///< Unique ID that is required by ACPI if two devices have the same _HID.
+ ///< This value must also match the corresponding _UID/_HID pair in the ACPI name space.
+} UNIVERSAL_PAYLOAD_PCI_ROOT_BRIDGE;
+
+typedef struct {
+ UNIVERSAL_PAYLOAD_GENERIC_HEADER Header;
+ BOOLEAN ResourceAssigned;
+ UINT8 Count;
+ UNIVERSAL_PAYLOAD_PCI_ROOT_BRIDGE RootBridge[0];
+} UNIVERSAL_PAYLOAD_PCI_ROOT_BRIDGES;
+
+#pragma pack()
+
+#define UNIVERSAL_PAYLOAD_PCI_ROOT_BRIDGES_REVISION 1
+
+extern GUID gUniversalPayloadPciRootBridgeInfoGuid;
+
+#endif // UNIVERSAL_PAYLOAD_PCI_ROOT_BRIDGES_H_
diff --git a/BootloaderCommonPkg/Include/UniversalPayload/SerialPortInfo.h b/BootloaderCommonPkg/Include/UniversalPayload/SerialPortInfo.h
new file mode 100644
index 00000000..87181f76
--- /dev/null
+++ b/BootloaderCommonPkg/Include/UniversalPayload/SerialPortInfo.h
@@ -0,0 +1,30 @@
+/** @file
+ This file defines the structure for serial port info.
+
+ Copyright (c) 2021, Intel Corporation. All rights reserved.
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+ @par Revision Reference:
+ - Universal Payload Specification 0.75 (https://universalpayload.github.io/documentation/)
+**/
+
+#ifndef UNIVERSAL_PAYLOAD_SERIAL_PORT_INFO_H_
+#define UNIVERSAL_PAYLOAD_SERIAL_PORT_INFO_H_
+
+#include
+
+#pragma pack(1)
+typedef struct {
+ UNIVERSAL_PAYLOAD_GENERIC_HEADER Header;
+ BOOLEAN UseMmio;
+ UINT8 RegisterStride;
+ UINT32 BaudRate;
+ EFI_PHYSICAL_ADDRESS RegisterBase;
+} UNIVERSAL_PAYLOAD_SERIAL_PORT_INFO;
+#pragma pack()
+
+#define UNIVERSAL_PAYLOAD_SERIAL_PORT_INFO_REVISION 1
+
+extern GUID gUniversalPayloadSerialPortInfoGuid;
+
+#endif // UNIVERSAL_PAYLOAD_SERIAL_PORT_INFO_H_
diff --git a/BootloaderCommonPkg/Include/UniversalPayload/SmbiosTable.h b/BootloaderCommonPkg/Include/UniversalPayload/SmbiosTable.h
new file mode 100644
index 00000000..94c4aaf7
--- /dev/null
+++ b/BootloaderCommonPkg/Include/UniversalPayload/SmbiosTable.h
@@ -0,0 +1,30 @@
+/** @file
+ Define the structure for the Universal Payload SmBios.
+
+Copyright (c) 2021, Intel Corporation. All rights reserved.
+SPDX-License-Identifier: BSD-2-Clause-Patent
+
+ @par Revision Reference:
+ - Universal Payload Specification 0.75 (https://universalpayload.github.io/documentation/)
+**/
+
+#ifndef UNIVERSAL_PAYLOAD_SMBIOS_TABLE_H_
+#define UNIVERSAL_PAYLOAD_SMBIOS_TABLE_H_
+
+#include
+#include
+
+#pragma pack (1)
+
+typedef struct {
+ UNIVERSAL_PAYLOAD_GENERIC_HEADER Header;
+ EFI_PHYSICAL_ADDRESS SmBiosEntryPoint;
+} UNIVERSAL_PAYLOAD_SMBIOS_TABLE;
+
+#pragma pack()
+
+#define UNIVERSAL_PAYLOAD_SMBIOS_TABLE_REVISION 1
+
+extern GUID gUniversalPayloadSmbios3TableGuid;
+extern GUID gUniversalPayloadSmbiosTableGuid;
+#endif // UNIVERSAL_PAYLOAD_SMBIOS_TABLE_H_
diff --git a/BootloaderCommonPkg/Include/UniversalPayload/UniversalPayload.h b/BootloaderCommonPkg/Include/UniversalPayload/UniversalPayload.h
new file mode 100644
index 00000000..bc8a3e0c
--- /dev/null
+++ b/BootloaderCommonPkg/Include/UniversalPayload/UniversalPayload.h
@@ -0,0 +1,59 @@
+/** @file
+ Universal Payload general definitions.
+
+Copyright (c) 2021, Intel Corporation. All rights reserved.
+SPDX-License-Identifier: BSD-2-Clause-Patent
+
+ @par Revision Reference:
+ - Universal Payload Specification 0.75 (https://universalpayload.github.io/documentation/)
+**/
+
+#ifndef UNIVERSAL_PAYLOAD_H_
+#define UNIVERSAL_PAYLOAD_H_
+
+/**
+ Main entry point to Universal Payload.
+
+ @param HobList Pointer to the beginning of the HOB List from boot loader.
+**/
+typedef VOID (EFIAPI *UNIVERSAL_PAYLOAD_ENTRY) (VOID *HobList);
+
+#define UNIVERSAL_PAYLOAD_IDENTIFIER SIGNATURE_32('U', 'P', 'L', 'D')
+#define UNIVERSAL_PAYLOAD_INFO_SEC_NAME ".upld_info"
+#define UNIVERSAL_PAYLOAD_EXTRA_SEC_NAME_PREFIX ".upld."
+#define UNIVERSAL_PAYLOAD_EXTRA_SEC_NAME_PREFIX_LENGTH (sizeof (UNIVERSAL_PAYLOAD_EXTRA_SEC_NAME_PREFIX) - 1)
+
+#pragma pack(1)
+
+typedef struct {
+ UINT32 Identifier;
+ UINT32 HeaderLength;
+ UINT16 SpecRevision;
+ UINT8 Reserved[2];
+ UINT32 Revision;
+ UINT32 Attribute;
+ UINT32 Capability;
+ CHAR8 ProducerId[16];
+ CHAR8 ImageId[16];
+} UNIVERSAL_PAYLOAD_INFO_HEADER;
+
+typedef struct {
+ UINT8 Revision;
+ UINT8 Reserved;
+ UINT16 Length;
+} UNIVERSAL_PAYLOAD_GENERIC_HEADER;
+
+#pragma pack()
+
+/**
+ Returns the size of a structure of known type, up through and including a specified field.
+
+ @param TYPE The name of the data structure that contains the field specified by Field.
+ @param Field The name of the field in the data structure.
+
+ @return size, in bytes.
+
+**/
+#define UNIVERSAL_PAYLOAD_SIZEOF_THROUGH_FIELD(TYPE, Field) (OFFSET_OF(TYPE, Field) + sizeof (((TYPE *) 0)->Field))
+
+#endif // UNIVERSAL_PAYLOAD_H_