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[TGL] Update Vtd support 

GNVS should be aligned with VTD PCD
Fix a DMR check issue.

Signed-off-by: Guo Dong <guo.dong@intel.com>
This commit is contained in:
Guo Dong 2021-02-14 13:27:39 -07:00
parent 7af9db9f40
commit 57fb7e2fb3
2 changed files with 5 additions and 4 deletions
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2
Silicon/TigerlakePkg/Library/Stage2SocInitLib/Stage2SocInitLib.c
View File

@ -70,7 +70,7 @@ SocUpdateAcpiGnvs (
McD0BaseAddress = PCI_LIB_ADDRESS (SA_MC_BUS, 0, 0, 0);
McD2BaseAddress = PCI_LIB_ADDRESS (SA_IGD_BUS, SA_IGD_DEV, SA_IGD_FUN_0, 0);
Gnvs->SaNvs.VtdDisable = FALSE;
Gnvs->SaNvs.VtdDisable = !FeaturePcdGet (PcdVtdEnabled);
for (Index = 0; Index < SA_VTD_ENGINE_NUMBER; Index++) {
Gnvs->SaNvs.VtdBaseAddress[Index] = ReadVtdBaseAddress (Index);
}

7
Silicon/TigerlakePkg/Library/VTdLib/VTdLib.c
View File

@ -97,6 +97,7 @@ UpdateDrhd (
UINT16 DisableBit;
BOOLEAN NeedRemove;
EFI_ACPI_DRHD_ENGINE1_STRUCT *DrhdEngine;
UINT32 VidDid;
//
// Convert DrhdEnginePtr to EFI_ACPI_DRHD_ENGINE1_STRUCT Pointer
@ -109,15 +110,15 @@ UpdateDrhd (
);
NeedRemove = FALSE;
VidDid = PciRead32 (PCI_LIB_ADDRESS (0, DrhdEngine->DeviceScope[0].PciPath.Device, DrhdEngine->DeviceScope[0].PciPath.Function, 0x00));
if ((DisableBit == 0xFF) ||
(DrhdEngine->DrhdHeader.RegisterBaseAddress == 0) ||
((DisableBit == 0x80) &&
(PciRead32 (PCI_LIB_ADDRESS (0, DrhdEngine->DeviceScope[0].PciPath.Device, DrhdEngine->DeviceScope[0].PciPath.Function, 0x00)) == 0xFFFFFFFF))
((DisableBit == 0x80) && (VidDid == 0xFFFFFFFF))
) {
NeedRemove = TRUE;
}
if ((DrhdEngine->DeviceScope[0].PciPath.Device == SA_IGD_DEV) && (DrhdEngine->DeviceScope[0].PciPath.Function == SA_IGD_FUN_0) &&
(PciRead32 (PCI_LIB_ADDRESS (0, DrhdEngine->DeviceScope[0].PciPath.Device, DrhdEngine->DeviceScope[0].PciPath.Function, 0x00)) == 0xFFFFFFFF)) {
(VidDid != 0xFFFFFFFF)) {
NeedRemove = IsDisplayOnlySku();
}
if (NeedRemove) {