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Reprogram SMRR base and mask on S3 path for CFL 

This patch will generate a SW smi on S3 resume path when using
UEFI payload. Handler for this Sw smi in UEFI payload will
program SMRR base and mask for BSP and all AP's.

Signed-off-by: Raghava Gudla <raghava.gudla@intel.com>
This commit is contained in:
Raghava Gudla 2020-05-08 16:26:06 -07:00 committed by Guo Dong
parent 26499043d2
commit 45e2900164
4 changed files with 57 additions and 10 deletions
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20
BootloaderCorePkg/Include/Library/S3SaveRestoreLib.h
View File

@ -13,6 +13,7 @@
#define SMMBASE_INFO_COMM_ID 1
#define S3_SAVE_REG_COMM_ID 2
#define BL_SW_SMI_COMM_ID 3
//
// Format to share info between bootloader and payload.
@ -89,8 +90,27 @@ typedef struct {
CPU_SMMBASE SmmBase[];
} SMMBASE_INFO;
typedef struct {
BL_PLD_COMM_HDR BlSwSmiHdr;
UINT8 BlSwSmiHandlerInput;
} BL_SW_SMI_INFO;
#pragma pack()
/**
Trigger Payload software SMI
This function triggers software SMI. SMI number will be obtained
from SMM communication area.
@param[in] SwSmiNumber Software smi number to be triggered.
**/
VOID
TriggerPayloadSwSmi (
IN UINT8 SwSmiNumber
);
/**
This function appends information in TSEG area
designated for S3 save/restore purpose.

18
BootloaderCorePkg/Library/S3SaveRestoreLib/S3SaveRestore.c
View File

@ -21,6 +21,7 @@ typedef VOID (*REG_WRITE) (UINTN, UINT32);
#define NUM_TYPE 2
#define NUM_WIDTH 3
#define REG_APM_CNT 0xB2
const REG_WRITE mRegWrite[NUM_TYPE][NUM_WIDTH] = {
{ (REG_WRITE) MmioWrite8, (REG_WRITE) MmioWrite16, (REG_WRITE) MmioWrite32 },
@ -38,6 +39,23 @@ const UINT8 mWidthToIdx[NUM_WIDTH][2] = {
{ 2, WIDE32 }
};
/**
Trigger payload software SMI
This function triggers software SMI. SMI number will be obtained
from SMM communication area.
@param[in] SwSmiNumber Software smi number to be triggered.
**/
VOID
TriggerPayloadSwSmi (
IN UINT8 SwSmiNumber
)
{
IoWrite8(REG_APM_CNT, SwSmiNumber);
}
/**
This function appends information in TSEG area
designated for S3 save/restore purpose.

2
BootloaderCorePkg/Library/S3SaveRestoreLib/S3SaveRestoreLib.inf
View File

@ -35,5 +35,3 @@
[Guids]
gSmmInformationGuid
[Pcd]

27
Platform/CoffeelakeBoardPkg/Library/Stage2BoardInitLib/Stage2BoardInitLib.c
View File

@ -965,6 +965,7 @@ BoardInit (
UINT32 AddressPort;
UINTN SpiBar0;
UINT32 Length;
BL_SW_SMI_INFO *BlSwSmiInfo;
VTD_INFO *VtdInfo;
EFI_PEI_GRAPHICS_INFO_HOB *FspGfxHob;
LOADER_GLOBAL_DATA *LdrGlobal;
@ -1041,6 +1042,24 @@ BoardInit (
case PrePciEnumeration:
break;
case PostPciEnumeration:
if (GetBootMode() == BOOT_ON_S3_RESUME) {
//
// Clear Smi
//
ClearSmi ();
RestoreS3RegInfo (FindS3Info (S3_SAVE_REG_COMM_ID));
BlSwSmiInfo = NULL;
//
// If UEFI payload registered a software SMI handler
// for bootloader to restore SMRR base and mask in
// S3 resume path, trigger sw smi
//
BlSwSmiInfo = FindS3Info (BL_SW_SMI_COMM_ID);
if (BlSwSmiInfo != NULL) {
TriggerPayloadSwSmi (BlSwSmiInfo->BlSwSmiHandlerInput);
}
}
break;
case PrePayloadLoading:
Status = IgdOpRegionInit ();
@ -1073,14 +1092,6 @@ BoardInit (
}
break;
case ReadyToBoot:
//
// Clear Smi and restore S3 regs on S3 resume
//
ClearSmi ();
if ((GetBootMode() == BOOT_ON_S3_RESUME) && (GetPayloadId () == UEFI_PAYLOAD_ID_SIGNATURE)) {
RestoreS3RegInfo (FindS3Info (S3_SAVE_REG_COMM_ID));
}
//
// Do necessary locks, and clean up before jumping tp OS
//