Add PciSegmentLib implementation

This patch added PciSegmentLib implementation from EDK2 MdePkg.
This library can be used by silicon libraries to access PCI
device with multiple segments. As part of this change, the
duplicated files were removed for CML and CMLV.

Signed-off-by: Maurice Ma <maurice.ma@intel.com>

BootloaderCorePkg/BootloaderCorePkg.dsc

@@ -44,6 +44,7 @@
   PciLib|MdePkg/Library/BasePciLibPciExpress/BasePciLibPciExpress.inf
   PciCf8Lib|MdePkg/Library/BasePciCf8Lib/BasePciCf8Lib.inf
   PciExpressLib|MdePkg/Library/BasePciExpressLib/BasePciExpressLib.inf
+  PciSegmentLib|MdePkg/Library/BasePciSegmentLibPci/BasePciSegmentLibPci.inf
   DebugPrintErrorLevelLib|BootloaderCorePkg/Library/DebugPrintErrorLevelLib/DebugPrintErrorLevelLib.inf
   PrintLib|MdePkg/Library/BasePrintLib/BasePrintLib.inf
   BaseMemoryLib|MdePkg/Library/BaseMemoryLibSse2/BaseMemoryLibSse2.inf

MdePkg/Include/Library/PciSegmentLib.h

@@ -23,8 +23,8 @@
   access method.  Modules will typically use the PCI Segment Library for its PCI configuration
   accesses when PCI Segments other than Segment #0 must be accessed.
 
-  Copyright (c) 2006 - 2019, Intel Corporation. All rights reserved.<BR>
-  SPDX-License-Identifier: BSD-2-Clause-Patent
+Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
+SPDX-License-Identifier: BSD-2-Clause-Patent
 
 **/
 
@@ -984,7 +984,7 @@ PciSegmentBitFieldAndThenOr32 (
   Size into the buffer specified by Buffer. This function only allows the PCI
   configuration registers from a single PCI function to be read. Size is
   returned. When possible 32-bit PCI configuration read cycles are used to read
-  from StartAdress to StartAddress + Size. Due to alignment restrictions, 8-bit
+  from StartAddress to StartAddress + Size. Due to alignment restrictions, 8-bit
   and 16-bit PCI configuration read cycles may be used at the beginning and the
   end of the range.
 
@@ -1016,7 +1016,7 @@ PciSegmentReadBuffer (
   Size from the buffer specified by Buffer. This function only allows the PCI
   configuration registers from a single PCI function to be written. Size is
   returned. When possible 32-bit PCI configuration write cycles are used to
-  write from StartAdress to StartAddress + Size. Due to alignment restrictions,
+  write from StartAddress to StartAddress + Size. Due to alignment restrictions,
   8-bit and 16-bit PCI configuration write cycles may be used at the beginning
   and the end of the range.
 

MdePkg/Library/BasePciSegmentLibPci/BasePciSegmentLibPci.inf

@@ -0,0 +1,37 @@
+## @file
+# Instance of PCI Segment Library based on PCI Library.
+#
+# PCI Segment Library that layers on top of the PCI Library which only
+#  supports segment 0 PCI configuration access.
+#
+# Copyright (c) 2016 - 2018, Intel Corporation. All rights reserved.<BR>
+#
+#  SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+#
+##
+
+[Defines]
+  INF_VERSION                    = 0x00010005
+  BASE_NAME                      = BasePciSegmentLibPci
+  FILE_GUID                      = AABF95D6-F40C-405F-8360-6A59794B8040
+  MODULE_TYPE                    = BASE
+  VERSION_STRING                 = 1.0
+  LIBRARY_CLASS                  = PciSegmentLib
+
+#
+# The following information is for reference only and not required by the build tools.
+#
+#  VALID_ARCHITECTURES           = IA32 X64 EBC
+#
+
+[Sources]
+  PciSegmentLib.c
+
+[Packages]
+  MdePkg/MdePkg.dec
+
+[LibraryClasses]
+  BaseLib
+  PciLib
+  DebugLib

MdePkg/Library/BasePciSegmentLibPci/PciSegmentLib.c

@@ -2,7 +2,7 @@
   PCI Segment Library that layers on top of the PCI Library which only
    supports segment 0 PCI configuration access.
 
-  Copyright (c) 2016 - 2019, Intel Corporation. All rights reserved.<BR>
+  Copyright (c) 2016 - 2017, Intel Corporation. All rights reserved.<BR>
   SPDX-License-Identifier: BSD-2-Clause-Patent
 
 **/
@@ -11,7 +11,7 @@
 #include <Library/BaseLib.h>
 #include <Library/DebugLib.h>
 #include <Library/PciLib.h>
-#include <PciSegmentLib.h>
+#include <Library/PciSegmentLib.h>
 
 /**
   Assert the validity of a PCI Segment address.
@@ -1129,9 +1129,6 @@ PciSegmentReadBuffer (
 
   ASSERT (Buffer != NULL);
 
-  if (Buffer == NULL) {
-    return 0;
-  }
   //
   // Save Size for return
   //
@@ -1229,9 +1226,7 @@ PciSegmentWriteBuffer (
   }
 
   ASSERT (Buffer != NULL);
- if (Buffer == NULL) {
-  return 0;
- }
+
   //
   // Save Size for return
   //

Silicon/CometlakePkg/Library/HeciLib/HeciCore.h

@@ -153,7 +153,7 @@ IshHeciSendAndReceive (
   );
 
 
-#include <PciSegmentLib.h>
+#include <Library/PciSegmentLib.h>
 #include <HeciInitLib.h>
 
 #endif // _HECI_CORE_H

Silicon/CometlakePkg/Library/HeciLib/HeciLib.inf

@@ -21,8 +21,6 @@
   CseMsg.h
   HeciInitLib.h
   HeciHelper.h
-  PciSegmentLib.h
-  PciSegmentLib.c
   HeciCore.c
   HeciHpet.c
   HeciHelper.c
@@ -53,6 +51,7 @@
   DebugLib
   PchInfoLib
   GpioLib
+  PciSegmentLib
 
 [Guids]
   gLoaderPlatformDeviceInfoGuid

Silicon/CometlakevPkg/Library/HeciLib/HeciCore.h

@@ -153,7 +153,7 @@ IshHeciSendAndReceive (
   );
 
 
-#include <PciSegmentLib.h>
+#include <Library/PciSegmentLib.h>
 #include <HeciInitLib.h>
 
 #endif // _HECI_CORE_H

Silicon/CometlakevPkg/Library/HeciLib/HeciLib.inf

@@ -20,9 +20,7 @@
   HeciCore.h
   HeciInitLib.h
   CseMsg.h
-  PciSegmentLib.h
   HeciHpet.h
-  PciSegmentLib.c
   HeciCore.c
   HeciHpet.c
   HeciHelper.c
@@ -53,6 +51,7 @@
   DebugLib
   PchInfoLib
   GpioLib
+  PciSegmentLib
 
 [Guids]
   gLoaderPlatformDeviceInfoGuid