OrgACRN
/
slimbootloader
mirror of https://github.com/slimbootloader/slimbootloader.git
1
0
Fork 0
Code Issues Releases Wiki Activity

fix: [MTL] Update stitch config to for all boards 

Updated stitch configs for RVP (revB), CRB and LP5 boards

TEST: Able to boot into Ubuntu and Windows

Signed-off-by: Kobe <kok.tong.ong@intel.com>
This commit is contained in:
Kobe 2023-10-19 12:03:49 +08:00 committed by Guo Dong
parent ab30dc5e76
commit 3d070ab7f7
1 changed files with 51 additions and 18 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

69
Platform/MeteorlakeBoardPkg/Script/StitchIfwiConfig_mtlp.py
View File

@ -175,6 +175,7 @@ def get_xml_change_list (platform, plt_params_list):
('./FlexIO/Type-CSubsystemConfiguration/IomBinaryFile', '$SourceDir\Iom.bin'),
('./FlexIO/Type-CSubsystemConfiguration/XdciSplitDieConfig', 'xDCI Split Die Enabled'),
('./FlexIO/PhyConfiguration/PhyBinaryFile', '$SourceDir\CsePlugin#SPHY.bin'),
('./FlexIO/PciePortConfiguration/PCIeController1', '4x1'),
('./FlexIO/PciePortConfiguration/PCIeController2', '4x1'),
('./FlexIO/Usb3PortConfiguration/USB3Prt1ConTypeSel', 'Type A / Type C'),
('./FlexIO/Usb3PortConfiguration/USB3Prt2ConTypeSel', 'Type A / Type C'),
@ -185,7 +186,7 @@ def get_xml_change_list (platform, plt_params_list):
('./FlexIO/Usb2PortConfiguration/USB2Prt8ConTypeSel', 'Type A / Type C'),
('./FlexIO/Usb2PortConfiguration/USB2Prt9ConTypeSel', 'Type A / Type C'),
('./FlexIO/Usb2PortConfiguration/USB2Prt10ConTypeSel', 'Type A / Type C'),
('./FlexIO/Usb2PortConfiguration/USB2Prt1ConTypeSel', 'Type C'),
('./FlexIO/Usb2PortConfiguration/USB2Prt1ConTypeSel', 'Type A / Type C'),
('./NetworkingConnectivity/WiredLanConfiguration/LanEnable', 'Yes'),
('./Icc/SocClkOutCfg/BUFF_EN_SRC0', 'enable'),
('./Icc/SocClkOutCfg/BUFF_EN_SRC1', 'enable'),
@ -207,6 +208,17 @@ def get_xml_change_list (platform, plt_params_list):
('./Icc/IoeClkOutCfg/IOE_SRC_MUXSEL_CFG1', 'GPP_D19(SRCCLKREQ7#)'),
('./Icc/IoeClkOutCfg/IOE_SRC_MUXSEL_CFG2', 'GPP_D20(SRCCLKREQ8#)'),
('./Icc/IoeClkOutCfg/IOE_SSC_en', 'enable'),
('./FlexIO/Type-CSubsystemConfiguration/TypeCPort2Config', 'DP Fixed Connection'),
('./FlexIO/Type-CSubsystemConfiguration/TypeCPort3Config', 'DP Fixed Connection'),
('./FlexIO/Type-CSubsystemConfiguration/TypeCPort4Config', 'DP Fixed Connection'),
('./FlexIO/Type-CSubsystemConfiguration/TboltPort12Retimer', 'Port 1 Retimer Enabled'),
('./FlexIO/Type-CSubsystemConfiguration/TboltPort34Retimer', 'No Retimers'),
('./FlexIO/TypeCPortConfiguration/TypeCPorts1and2SpdselPair', 'Type C Port 1 and 2 Gen 2x1'),
('./FlexIO/TypeCPortConfiguration/TypeCPorts3and4SpdselPair', 'Type C Port 1 and 2 Gen 2x1'),
('./FlexIO/PowerDelivery_PdControllerConfiguration/TypeCPort1RetimerEnabled', 'No'),
('./FlexIO/PowerDelivery_PdControllerConfiguration/TypeCPort2Mode', 'No'),
('./FlexIO/PowerDelivery_PdControllerConfiguration/TypeCPort3Mode', 'No'),
('./FlexIO/PowerDelivery_PdControllerConfiguration/TypeCPort4Mode', 'No'),
])
if 'debug' in plt_params_list:
@ -251,28 +263,49 @@ def get_xml_change_list (platform, plt_params_list):
('./FlexIO/Type-CSubsystemConfiguration/TypeCPort2Config', 'DP Fixed Connection'),
('./FlexIO/PowerDelivery_PdControllerConfiguration/TypeCPort1RetimerEnabled', 'No'),
('./FlexIO/PowerDelivery_PdControllerConfiguration/TypeCPort1RetimerConfig', 'No'),
('./FlexIO/Type-CSubsystemConfiguration/TypeCPort3Config', 'No Restrictions'),
('./FlexIO/Type-CSubsystemConfiguration/TypeCPort4Config', 'No Restrictions'),
('./FlexIO/Type-CSubsystemConfiguration/TboltPort12Retimer', 'No Retimers'),
('./FlexIO/Type-CSubsystemConfiguration/TboltPort34Retimer', 'Ports 3 and 4 Retimer Enabled'),
('./FlexIO/Type-CSubsystemConfiguration/TboltUsb4Port34SpdCap', 'Port 3 TBT Gen 2 / Port 4 TBT Gen 3'),
('./FlexIO/TypeCPortConfiguration/TypeCPorts1and2SpdselPair', 'Type C Port 1 and 2 Gen 2x2'),
('./FlexIO/PowerDelivery_PdControllerConfiguration/TypeCPort3Mode', 'Yes'),
('./FlexIO/PowerDelivery_PdControllerConfiguration/TypeCPort4Mode', 'Yes'),
])
if 'crb' in plt_params_list:
print ("Applying changes to enable CRB")
xml_change_list.append ([
('./FlexIO/PciePortConfiguration/PCIeController1', '1x4 Lane Reversed'),
('./FlexIO/Usb3PortConfiguration/Usb32Port1and2SpdselPair', 'USB 3.2 Port 1 and 2 Gen 1x1'),
('./FlexIO/Usb2PortConfiguration/USB2Prt3ConTypeSel', 'Type A / Type C'),
('./FlexIO/Usb2PortConfiguration/USB2Prt4ConTypeSel', 'Type A / Type C'),
('./FlexIO/Type-CSubsystemConfiguration/TypeCPort1Config', 'DP Fixed Connection'),
('./FlexIO/Type-CSubsystemConfiguration/TypeCPort2Config', 'DP Fixed Connection'),
('./FlexIO/Type-CSubsystemConfiguration/TboltPort12Retimer', 'No Retimers'),
('./FlexIO/PowerDelivery_PdControllerConfiguration/TypeCPort1Mode', 'No'),
('./FlexIO/PowerDelivery_PdControllerConfiguration/TypeCPort1RetimerEnabled', 'No'),
('./FlexIO/PowerDelivery_PdControllerConfiguration/TypeCPort1RetimerConfig', 'No'),
('./FlexIO/PowerDelivery_PdControllerConfiguration/USB2PortForTypeCPort1', 'USB2 Port 9'),
('./FlexIO/PowerDelivery_PdControllerConfiguration/TypeCPort2Mode', 'No'),
('./FlexIO/PowerDelivery_PdControllerConfiguration/TypeCPort2RetimerEnabled', 'No'),
('./FlexIO/PowerDelivery_PdControllerConfiguration/TypeCPort2RetimerConfig', 'No'),
('./FlexIO/PowerDelivery_PdControllerConfiguration/USB2PortForTypeCPort2', 'USB2 Port 10'),
('./FlexIO/PowerDelivery_PdControllerConfiguration/USB2PortForTypeCPort3', 'USB2 Port 1'),
('./FlexIO/PowerDelivery_PdControllerConfiguration/USB2PortForTypeCPort4', 'USB2 Port 2'),
('./FlexIO/PciePortConfiguration/PCIeController1', '1x4 Lane Reversed'),
('./FlexIO/Usb3PortConfiguration/Usb32Port1and2SpdselPair', 'USB 3.2 Port 1 and 2 Gen 1x1'),
('./FlexIO/Usb2PortConfiguration/USB2Prt3ConTypeSel', 'Type A / Type C'),
('./FlexIO/Usb2PortConfiguration/USB2Prt4ConTypeSel', 'Type A / Type C'),
('./FlexIO/Type-CSubsystemConfiguration/TypeCPort1Config', 'DP Fixed Connection'),
('./FlexIO/Type-CSubsystemConfiguration/TypeCPort2Config', 'DP Fixed Connection'),
('./FlexIO/Type-CSubsystemConfiguration/TboltPort12Retimer', 'No Retimers'),
('./FlexIO/PowerDelivery_PdControllerConfiguration/TypeCPort1Mode', 'No'),
('./FlexIO/PowerDelivery_PdControllerConfiguration/TypeCPort1RetimerEnabled', 'No'),
('./FlexIO/PowerDelivery_PdControllerConfiguration/TypeCPort1RetimerConfig', 'No'),
('./FlexIO/PowerDelivery_PdControllerConfiguration/USB2PortForTypeCPort1', 'USB2 Port 9'),
('./FlexIO/PowerDelivery_PdControllerConfiguration/TypeCPort2Mode', 'No'),
('./FlexIO/PowerDelivery_PdControllerConfiguration/TypeCPort2RetimerEnabled', 'No'),
('./FlexIO/PowerDelivery_PdControllerConfiguration/TypeCPort2RetimerConfig', 'No'),
('./FlexIO/PowerDelivery_PdControllerConfiguration/USB2PortForTypeCPort2', 'USB2 Port 10'),
('./FlexIO/PowerDelivery_PdControllerConfiguration/USB2PortForTypeCPort3', 'USB2 Port 1'),
('./FlexIO/PowerDelivery_PdControllerConfiguration/USB2PortForTypeCPort4', 'USB2 Port 2'),
('./FlexIO/Type-CSubsystemConfiguration/TypeCPort3Config', 'No Restrictions'),
('./FlexIO/Type-CSubsystemConfiguration/TypeCPort4Config', 'No Restrictions'),
('./FlexIO/Type-CSubsystemConfiguration/TboltPort34Retimer', 'Ports 3 and 4 Retimer Enabled'),
('./FlexIO/TypeCPortConfiguration/TypeCPorts1and2SpdselPair', 'Type C Port 1 and 2 Gen 2x2'),
('./FlexIO/PowerDelivery_PdControllerConfiguration/TypeCPort3Mode', 'Yes'),
('./FlexIO/PowerDelivery_PdControllerConfiguration/TypeCPort4Mode', 'Yes'),
('./FlexIO/Usb2PortConfiguration/USB2Prt1ConTypeSel', 'Type C'),
('./NetworkingConnectivity/WirelessLanConfiguration/MeClinkEnable', 'Yes'),
('./Icc/SocClkOutCfg/BUFF_EN_SRC3', 'disable'),
('./Icc/SocClkOutCfg/BUFF_EN_SRC4', 'disable'),
('./Icc/SocClkOutCfg/BUFF_EN_SRC5', 'disable'),
('./Icc/SocClkOutCfg/SSC_en', 'disable'),
('./Icc/IoeClkOutCfg/IOE_SSC_en', 'disable'),
])