181 lines
6.0 KiB
Diff
181 lines
6.0 KiB
Diff
From 76a88d1086a3c105860ed68cf807bf2b419a6121 Mon Sep 17 00:00:00 2001
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From: Pei Zhang <pei.zhang@intel.com>
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Date: Fri, 14 Sep 2018 16:10:19 +0800
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Subject: [PATCH 475/550] drm/i915/gvt: add module parameter enable_pvmmio
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This uint type module parameter is used to control the pvmmio
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features for MMIO emulation in GVT. This parameter is default 0.
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Its permission type is 0400 which means user could only change its
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value through the cmdline, this is to prevent the dynamic modification
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during runtime which would break the pvmmio internal logic.
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Notice: this patch is required to be applied to guest kernel.
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Change-Id: I570f1fe02101e518595c02fce67601b692871aa9
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Signed-off-by: Pei Zhang <pei.zhang@intel.com>
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Signed-off-by: Jiang, Fei <fei.jiang@intel.com>
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Acknowledged-by: Singh, Satyeshwar <satyeshwar.singh@intel.com>
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Reviewed-on:
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Reviewed-by: He, Min <min.he@intel.com>
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Reviewed-by: Jiang, Fei <fei.jiang@intel.com>
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Reviewed-by: Dong, Eddie <eddie.dong@intel.com>
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Tested-by: Dong, Eddie <eddie.dong@intel.com>
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---
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drivers/gpu/drm/i915/i915_drv.c | 21 +++++++++++++++++++++
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drivers/gpu/drm/i915/i915_drv.h | 1 +
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drivers/gpu/drm/i915/i915_params.c | 5 +++++
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drivers/gpu/drm/i915/i915_params.h | 1 +
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drivers/gpu/drm/i915/i915_pvinfo.h | 13 ++++++++++++-
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drivers/gpu/drm/i915/i915_vgpu.c | 9 +++++++++
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6 files changed, 49 insertions(+), 1 deletion(-)
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diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
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index 91fd59fe6345..acc3be54b9f4 100644
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--- a/drivers/gpu/drm/i915/i915_drv.c
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+++ b/drivers/gpu/drm/i915/i915_drv.c
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@@ -51,6 +51,7 @@
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#include "i915_pmu.h"
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#include "i915_query.h"
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#include "i915_vgpu.h"
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+#include "intel_uc.h"
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#include "intel_drv.h"
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#include "intel_uc.h"
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@@ -991,6 +992,9 @@ static void i915_mmio_cleanup(struct drm_i915_private *dev_priv)
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intel_teardown_mchbar(dev_priv);
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pci_iounmap(pdev, dev_priv->regs);
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+ if (intel_vgpu_active(dev_priv) && dev_priv->shared_page)
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+ pci_iounmap(pdev, dev_priv->shared_page);
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+
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}
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/**
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@@ -1024,6 +1028,21 @@ static int i915_driver_init_mmio(struct drm_i915_private *dev_priv)
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intel_uc_init_mmio(dev_priv);
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+ if (intel_vgpu_active(dev_priv) && i915_modparams.enable_pvmmio) {
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+ u32 bar = 0;
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+ u32 mmio_size = 2 * 1024 * 1024;
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+
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+ /* Map a share page from the end of 2M mmio region in bar0. */
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+ dev_priv->shared_page = (struct gvt_shared_page *)
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+ pci_iomap_range(dev_priv->drm.pdev, bar,
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+ mmio_size, PAGE_SIZE);
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+ if (dev_priv->shared_page == NULL) {
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+ ret = -EIO;
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+ DRM_ERROR("ivi: failed to map share page.\n");
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+ goto err_uncore;
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+ }
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+ }
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+
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ret = intel_engines_init_mmio(dev_priv);
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if (ret)
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goto err_uncore;
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@@ -1033,6 +1052,8 @@ static int i915_driver_init_mmio(struct drm_i915_private *dev_priv)
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return 0;
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err_uncore:
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+ if (intel_vgpu_active(dev_priv) && dev_priv->shared_page)
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+ pci_iounmap(dev_priv->drm.pdev, dev_priv->shared_page);
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intel_uncore_fini(dev_priv);
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err_bridge:
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pci_dev_put(dev_priv->bridge_dev);
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diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
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index 671c1e66f9b7..a5f8d05793ba 100644
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--- a/drivers/gpu/drm/i915/i915_drv.h
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+++ b/drivers/gpu/drm/i915/i915_drv.h
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@@ -1590,6 +1590,7 @@ struct drm_i915_private {
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resource_size_t stolen_usable_size; /* Total size minus reserved ranges */
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void __iomem *regs;
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+ struct gvt_shared_page *shared_page;
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struct intel_uncore uncore;
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diff --git a/drivers/gpu/drm/i915/i915_params.c b/drivers/gpu/drm/i915/i915_params.c
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index 8bdd4043b563..062190f99a28 100644
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--- a/drivers/gpu/drm/i915/i915_params.c
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+++ b/drivers/gpu/drm/i915/i915_params.c
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@@ -196,6 +196,11 @@ i915_param_named(domain_scaler_owner, int, 0400,
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*
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*/
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+
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+i915_param_named(enable_pvmmio, uint, 0400,
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+ "Enable pv mmio feature and set pvmmio level, default 1."
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+ "This parameter could only set from host, guest value is set through vgt_if");
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+
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static __always_inline void _print_param(struct drm_printer *p,
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const char *name,
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const char *type,
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diff --git a/drivers/gpu/drm/i915/i915_params.h b/drivers/gpu/drm/i915/i915_params.h
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index 74865c23f809..358094837650 100644
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--- a/drivers/gpu/drm/i915/i915_params.h
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+++ b/drivers/gpu/drm/i915/i915_params.h
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@@ -69,6 +69,7 @@ struct drm_printer;
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param(bool, enable_dp_mst, true) \
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param(bool, enable_dpcd_backlight, false) \
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param(int, domain_scaler_owner, 0x11100) \
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+ param(unsigned int, enable_pvmmio, 0) \
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param(bool, enable_gvt, false)
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#define MEMBER(T, member, ...) T member;
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diff --git a/drivers/gpu/drm/i915/i915_pvinfo.h b/drivers/gpu/drm/i915/i915_pvinfo.h
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index dc9bdeaa3147..d1a3e3e68512 100644
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--- a/drivers/gpu/drm/i915/i915_pvinfo.h
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+++ b/drivers/gpu/drm/i915/i915_pvinfo.h
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@@ -49,6 +49,15 @@ enum vgt_g2v_type {
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VGT_G2V_MAX,
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};
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+#define VGPU_PVMMIO(vgpu) vgpu_vreg_t(vgpu, vgtif_reg(enable_pvmmio))
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+
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+/*
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+ * define different levels of PVMMIO optimization
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+ */
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+enum pvmmio_levels {
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+ PVMMIO_ELSP_SUBMIT = 0x1,
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+};
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+
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/*
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* VGT capabilities type
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*/
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@@ -106,9 +115,11 @@ struct vgt_if {
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u32 execlist_context_descriptor_lo;
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u32 execlist_context_descriptor_hi;
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+ u32 enable_pvmmio;
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+ u32 pv_mmio;
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u32 scaler_owned;
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- u32 rsv7[0x200 - 25]; /* pad to one page */
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+ u32 rsv7[0x200 - 27]; /* pad to one page */
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} __packed;
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#define vgtif_reg(x) \
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diff --git a/drivers/gpu/drm/i915/i915_vgpu.c b/drivers/gpu/drm/i915/i915_vgpu.c
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index 0f6182f32ded..d7a328f52978 100644
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--- a/drivers/gpu/drm/i915/i915_vgpu.c
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+++ b/drivers/gpu/drm/i915/i915_vgpu.c
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@@ -79,6 +79,15 @@ void i915_check_vgpu(struct drm_i915_private *dev_priv)
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dev_priv->vgpu.scaler_owned =
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__raw_i915_read32(dev_priv, vgtif_reg(scaler_owned));
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+ /* If guest wants to enable pvmmio, it needs to enable it explicitly
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+ * through vgt_if interface, and then read back the enable state from
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+ * gvt layer.
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+ */
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+ __raw_i915_write32(dev_priv, vgtif_reg(enable_pvmmio),
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+ i915_modparams.enable_pvmmio);
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+ i915_modparams.enable_pvmmio = __raw_i915_read16(dev_priv,
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+ vgtif_reg(enable_pvmmio));
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+
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dev_priv->vgpu.active = true;
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DRM_INFO("Virtual GPU for Intel GVT-g detected.\n");
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}
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--
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2.19.1
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