326 lines
8.1 KiB
Diff
326 lines
8.1 KiB
Diff
From ad6578ae656bea9bf45e4e54e01ff4f930a2eb8e Mon Sep 17 00:00:00 2001
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From: Mousumi Jana <mousumix.jana@intel.com>
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Date: Thu, 26 Nov 2015 01:28:34 +0530
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Subject: [PATCH 142/550] ASoC: Intel: Skylake:Add support to get fw
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configuration
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Debugfs gives the support to get the fw configuration depending on
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base fw property.
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Change-Id: Ib9bd67928939fdfc9443d9641a71a506e1ac22cb
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Signed-off-by: Mousumi Jana <mousumix.jana@intel.com>
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Reviewed-on:
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Reviewed-by: Babu, Ramesh <ramesh.babu@intel.com>
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Tested-by: Babu, Ramesh <ramesh.babu@intel.com>
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---
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sound/soc/intel/skylake/skl-debug.c | 206 +++++++++++++++++++++++++
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sound/soc/intel/skylake/skl-sst-dsp.h | 2 +
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sound/soc/intel/skylake/skl-topology.h | 26 ++++
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3 files changed, 234 insertions(+)
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diff --git a/sound/soc/intel/skylake/skl-debug.c b/sound/soc/intel/skylake/skl-debug.c
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index 23a5251e383b..ff6d8356cb4f 100644
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--- a/sound/soc/intel/skylake/skl-debug.c
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+++ b/sound/soc/intel/skylake/skl-debug.c
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@@ -33,6 +33,19 @@
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#define IPC_MOD_LARGE_CONFIG_SET 4
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#define MOD_BUF1 (3 * PAGE_SIZE)
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+#define DEFAULT_SZ 100
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+#define DEFAULT_ID 0XFF
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+#define ADSP_PROPERTIES_SZ 0x64
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+#define ADSP_RESOURCE_STATE_SZ 0x18
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+#define FIRMWARE_CONFIG_SZ 0x14c
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+#define HARDWARE_CONFIG_SZ 0x84
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+#define MODULES_INFO_SZ 0xa70
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+#define PIPELINE_LIST_INFO_SZ 0xc
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+#define SCHEDULERS_INFO_SZ 0x34
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+#define GATEWAYS_INFO_SZ 0x4e4
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+#define MEMORY_STATE_INFO_SZ 0x1000
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+#define POWER_STATE_INFO_SZ 0x1000
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+
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struct nhlt_blob {
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size_t size;
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struct nhlt_specific_cfg *cfg;
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@@ -49,6 +62,7 @@ struct skl_debug {
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struct nhlt_blob ssp_blob[2*MAX_SSP];
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struct nhlt_blob dmic_blob;
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u32 ipc_data[MAX_SZ];
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+ struct fw_ipc_data fw_ipc_data;
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};
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struct nhlt_specific_cfg
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@@ -551,6 +565,196 @@ static int skl_init_nhlt(struct skl_debug *d)
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return 0;
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}
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+static ssize_t adsp_control_read(struct file *file,
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+ char __user *user_buf, size_t count, loff_t *ppos)
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+{
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+
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+ struct skl_debug *d = file->private_data;
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+ char *buf1;
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+ ssize_t ret;
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+ unsigned int data, ofs = 0;
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+ int replysz = 0;
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+
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+ mutex_lock(&d->fw_ipc_data.mutex);
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+ replysz = d->fw_ipc_data.replysz;
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+ data = d->fw_ipc_data.adsp_id;
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+
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+ buf1 = kzalloc(MOD_BUF1, GFP_ATOMIC);
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+ if (!buf1) {
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+ mutex_unlock(&d->fw_ipc_data.mutex);
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+ return -ENOMEM;
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+ }
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+
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+ ret = snprintf(buf1, MOD_BUF1,
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+ "\nADSP_PROP ID %x\n", data);
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+ for (ofs = 0 ; ofs < replysz ; ofs += 16) {
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+ ret += snprintf(buf1 + ret, MOD_BUF1 - ret,
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+ "0x%.4x : ", ofs);
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+ hex_dump_to_buffer((u8 *)(&(d->fw_ipc_data.mailbx[0])) + ofs,
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+ 16, 16, 4,
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+ buf1 + ret, MOD_BUF1 - ret, 0);
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+ ret += strlen(buf1 + ret);
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+ if (MOD_BUF1 - ret > 0)
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+ buf1[ret++] = '\n';
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+ }
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+
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+ ret = simple_read_from_buffer(user_buf, count, ppos, buf1, ret);
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+ mutex_unlock(&d->fw_ipc_data.mutex);
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+ kfree(buf1);
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+
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+ return ret;
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+}
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+
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+static ssize_t adsp_control_write(struct file *file,
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+ const char __user *user_buf, size_t count, loff_t *ppos)
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+{
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+ struct skl_debug *d = file->private_data;
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+ char buf[8];
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+ int err, replysz;
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+ unsigned int dsp_property;
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+ u32 *ipc_data;
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+ struct skl_sst *ctx = d->skl->skl_sst;
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+ struct skl_ipc_large_config_msg msg;
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+ char id[8];
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+ u32 tx_data;
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+ int j = 0, bufsize, tx_param = 0, tx_param_id;
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+ int len = min(count, (sizeof(buf)-1));
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+
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+ mutex_lock(&d->fw_ipc_data.mutex);
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+ if (copy_from_user(buf, user_buf, len)) {
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+ mutex_unlock(&d->fw_ipc_data.mutex);
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+ return -EFAULT;
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+ }
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+
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+ buf[len] = '\0';
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+ bufsize = strlen(buf);
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+
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+ while (buf[j] != '\0') {
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+ if (buf[j] == ',') {
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+ strncpy(id, &buf[j+1], (bufsize-j));
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+ buf[j] = '\0';
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+ tx_param = 1;
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+ } else
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+ j++;
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+ }
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+
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+ err = kstrtouint(buf, 10, &dsp_property);
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+
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+ if ((dsp_property == DMA_CONTROL) || (dsp_property == ENABLE_LOGS)) {
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+ dev_err(d->dev, "invalid input !! not readable\n");
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+ mutex_unlock(&d->fw_ipc_data.mutex);
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+ return -EINVAL;
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+ }
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+
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+ if (tx_param == 1) {
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+ err = kstrtouint(id, 10, &tx_param_id);
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+ tx_data = (tx_param_id << 8) | dsp_property;
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+ }
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+
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+ ipc_data = kzalloc(DSP_BUF, GFP_ATOMIC);
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+ if (!ipc_data) {
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+ mutex_unlock(&d->fw_ipc_data.mutex);
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+ return -ENOMEM;
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+ }
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+
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+ switch (dsp_property) {
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+
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+ case ADSP_PROPERTIES:
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+ replysz = ADSP_PROPERTIES_SZ;
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+ break;
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+
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+ case ADSP_RESOURCE_STATE:
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+ replysz = ADSP_RESOURCE_STATE_SZ;
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+ break;
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+
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+ case FIRMWARE_CONFIG:
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+ replysz = FIRMWARE_CONFIG_SZ;
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+ break;
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+
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+ case HARDWARE_CONFIG:
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+ replysz = HARDWARE_CONFIG_SZ;
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+ break;
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+
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+ case MODULES_INFO:
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+ replysz = MODULES_INFO_SZ;
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+ break;
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+
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+ case PIPELINE_LIST_INFO:
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+ replysz = PIPELINE_LIST_INFO_SZ;
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+ break;
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+
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+ case SCHEDULERS_INFO:
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+ replysz = SCHEDULERS_INFO_SZ;
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+ break;
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+
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+ case GATEWAYS_INFO:
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+ replysz = GATEWAYS_INFO_SZ;
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+ break;
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+
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+ case MEMORY_STATE_INFO:
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+ replysz = MEMORY_STATE_INFO_SZ;
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+ break;
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+
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+ case POWER_STATE_INFO:
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+ replysz = POWER_STATE_INFO_SZ;
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+ break;
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+
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+ default:
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+ mutex_unlock(&d->fw_ipc_data.mutex);
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+ kfree(ipc_data);
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+ return -EINVAL;
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+ }
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+
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+ msg.module_id = 0x0;
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+ msg.instance_id = 0x0;
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+ msg.large_param_id = dsp_property;
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+ msg.param_data_size = replysz;
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+
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+ if (tx_param == 1)
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+ skl_ipc_get_large_config(&ctx->ipc, &msg,
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+ ipc_data, &tx_data, sizeof(u32));
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+ else
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+ skl_ipc_get_large_config(&ctx->ipc, &msg,
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+ ipc_data, NULL, 0);
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+
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+ memset(&d->fw_ipc_data.mailbx[0], 0, DSP_BUF);
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+
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+ memcpy(&d->fw_ipc_data.mailbx[0], ipc_data, replysz);
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+
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+ d->fw_ipc_data.adsp_id = dsp_property;
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+
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+ d->fw_ipc_data.replysz = replysz;
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+
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+ /* Userspace has been fiddling around behindthe kernel's back*/
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+ add_taint(TAINT_USER, LOCKDEP_NOW_UNRELIABLE);
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+ mutex_unlock(&d->fw_ipc_data.mutex);
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+ kfree(ipc_data);
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+
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+ return len;
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+}
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+
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+static const struct file_operations ssp_cntrl_adsp_fops = {
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+ .open = simple_open,
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+ .read = adsp_control_read,
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+ .write = adsp_control_write,
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+ .llseek = default_llseek,
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+};
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+
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+static int skl_init_adsp(struct skl_debug *d)
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+{
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+ if (!debugfs_create_file("adsp_prop_ctrl", 0644, d->fs, d,
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+ &ssp_cntrl_adsp_fops)) {
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+ dev_err(d->dev, "adsp control debugfs init failed\n");
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+ return -EIO;
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+ }
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+
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+ memset(&d->fw_ipc_data.mailbx[0], 0, DSP_BUF);
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+ d->fw_ipc_data.replysz = DEFAULT_SZ;
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+ d->fw_ipc_data.adsp_id = DEFAULT_ID;
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+
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+ return 0;
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+}
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+
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struct skl_debug *skl_debugfs_init(struct skl *skl)
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{
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struct skl_debug *d;
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@@ -559,6 +763,7 @@ struct skl_debug *skl_debugfs_init(struct skl *skl)
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if (!d)
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return NULL;
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+ mutex_init(&d->fw_ipc_data.mutex);
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/* create the debugfs dir with platform component's debugfs as parent */
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d->fs = debugfs_create_dir("dsp",
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skl->component->debugfs_root);
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@@ -591,6 +796,7 @@ struct skl_debug *skl_debugfs_init(struct skl *skl)
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}
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skl_init_nhlt(d);
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+ skl_init_adsp(d);
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skl_init_mod_set_get(d);
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return d;
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diff --git a/sound/soc/intel/skylake/skl-sst-dsp.h b/sound/soc/intel/skylake/skl-sst-dsp.h
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index 33de8c939bc4..767c6edddc3a 100644
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--- a/sound/soc/intel/skylake/skl-sst-dsp.h
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+++ b/sound/soc/intel/skylake/skl-sst-dsp.h
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@@ -127,6 +127,8 @@ struct skl_lib_info;
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#define SKL_ADSPCS_CPA_SHIFT 24
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#define SKL_ADSPCS_CPA_MASK(cm) ((cm) << SKL_ADSPCS_CPA_SHIFT)
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+#define DSP_BUF PAGE_SIZE
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+
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/* DSP Core state */
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enum skl_dsp_states {
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SKL_DSP_RUNNING = 1,
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diff --git a/sound/soc/intel/skylake/skl-topology.h b/sound/soc/intel/skylake/skl-topology.h
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index c6158d37f557..b8a1d8b90fe1 100644
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--- a/sound/soc/intel/skylake/skl-topology.h
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+++ b/sound/soc/intel/skylake/skl-topology.h
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@@ -32,6 +32,7 @@
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#define MAX_TS_GROUPS 8
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#define MAX_DMIC_TS_GROUPS 4
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#define MAX_FIXED_DMIC_PARAMS_SIZE 727
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+#define MAX_ADSP_SZ 1024
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/* Maximum number of coefficients up down mixer module */
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#define UP_DOWN_MIXER_MAX_COEFF 8
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@@ -514,6 +515,31 @@ struct mod_set_get {
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u32 mailbx[1024];
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};
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+enum base_fw_run_time_param {
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+ ADSP_PROPERTIES = 0,
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+ ADSP_RESOURCE_STATE = 1,
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+ NOTIFICATION_MASK = 3,
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+ ASTATE_TABLE = 4,
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+ DMA_CONTROL = 5,
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+ ENABLE_LOGS = 6,
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+ FIRMWARE_CONFIG = 7,
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+ HARDWARE_CONFIG = 8,
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+ MODULES_INFO = 9,
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+ PIPELINE_LIST_INFO = 10,
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+ PIPELINE_PROPS = 11,
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+ SCHEDULERS_INFO = 12,
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+ GATEWAYS_INFO = 13,
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+ MEMORY_STATE_INFO = 14,
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+ POWER_STATE_INFO = 15
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+};
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+
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+struct fw_ipc_data {
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+ u32 replysz;
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+ u32 adsp_id;
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+ u32 mailbx[MAX_ADSP_SZ];
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+ struct mutex mutex;
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+};
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+
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int skl_tplg_be_update_params(struct snd_soc_dai *dai,
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struct skl_pipe_params *params);
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int skl_dsp_set_dma_control(struct skl_sst *ctx, u32 *caps,
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--
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2.19.1
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