35 lines
1.2 KiB
Diff
35 lines
1.2 KiB
Diff
From e9f15ae3ab6d0e7eb1a31a7b03df04746b5e911c Mon Sep 17 00:00:00 2001
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From: Fei Jiang <fei.jiang@intel.com>
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Date: Mon, 23 Jul 2018 10:51:33 +0800
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Subject: [PATCH 625/743] drm/i915/gvt: enable plane update pvmmio through
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enable_pvmmio param
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plane update pvmmio level is 0x2, need set it in enable_pvmmio for both SOS
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and UOS kernel driver.
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Patch for both SOS and UOS.
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Signed-off-by: Fei Jiang <fei.jiang@intel.com>
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Reviewed-by: Min He <min.he@intel.com>
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Reviewed-by: Zhao Yakui <yakui.zhao@intel.com>
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---
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drivers/gpu/drm/i915/i915_params.h | 3 ++-
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1 file changed, 2 insertions(+), 1 deletion(-)
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diff --git a/drivers/gpu/drm/i915/i915_params.h b/drivers/gpu/drm/i915/i915_params.h
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index 358094837650..d9b901f622eb 100644
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--- a/drivers/gpu/drm/i915/i915_params.h
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+++ b/drivers/gpu/drm/i915/i915_params.h
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@@ -69,7 +69,8 @@ struct drm_printer;
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param(bool, enable_dp_mst, true) \
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param(bool, enable_dpcd_backlight, false) \
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param(int, domain_scaler_owner, 0x11100) \
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- param(unsigned int, enable_pvmmio, 0) \
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+ param(unsigned int, enable_pvmmio, \
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+ PVMMIO_ELSP_SUBMIT | PVMMIO_PLANE_UPDATE) \
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param(bool, enable_gvt, false)
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#define MEMBER(T, member, ...) T member;
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--
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2.19.2
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