48 lines
1.5 KiB
Diff
48 lines
1.5 KiB
Diff
From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
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From: Fei Jiang <fei.jiang@intel.com>
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Date: Tue, 10 Jul 2018 09:55:30 +0800
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Subject: [PATCH] drm/i915/gvt: don't treat EINVAL if trap pci_command and
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pci_status together
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Previously we only support single pci_command writing trap. While when
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system suspends, pci_command and pci_status are written together in 32
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bits, GVT-g also need trap them in such scenario.
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Signed-off-by: Fei Jiang <fei.jiang@intel.com>
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---
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drivers/gpu/drm/i915/gvt/cfg_space.c | 17 +++++++++++++++--
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1 file changed, 15 insertions(+), 2 deletions(-)
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diff --git a/drivers/gpu/drm/i915/gvt/cfg_space.c b/drivers/gpu/drm/i915/gvt/cfg_space.c
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index 707b0a5..f6bcfcb 100644
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--- a/drivers/gpu/drm/i915/gvt/cfg_space.c
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+++ b/drivers/gpu/drm/i915/gvt/cfg_space.c
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@@ -295,9 +295,22 @@ int intel_vgpu_emulate_cfg_write(struct intel_vgpu *vgpu, unsigned int offset,
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/* First check if it's PCI_COMMAND */
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if (IS_ALIGNED(offset, 2) && offset == PCI_COMMAND) {
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- if (WARN_ON(bytes > 2))
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+ if (WARN_ON(bytes != 2 && bytes != 4))
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return -EINVAL;
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- return emulate_pci_command_write(vgpu, offset, p_data, bytes);
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+
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+ ret = -EINVAL;
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+ if (bytes == 2)
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+ ret = emulate_pci_command_write(vgpu, offset,
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+ p_data, bytes);
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+ if (bytes == 4) {
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+ ret = emulate_pci_command_write(vgpu, offset,
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+ p_data, 2);
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+ if (ret)
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+ return ret;
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+ vgpu_pci_cfg_mem_write(vgpu, offset + 2,
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+ (u8 *)p_data + 2, 2);
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+ }
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+ return ret;
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}
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switch (rounddown(offset, 4)) {
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--
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https://clearlinux.org
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